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MAX485CSA+

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Maxim Integrated Global Sourcing Parts, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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MAX485CSA+

Maxim Integrated · Global Sourcing Parts · SOIC-8

MAX485CSA+ from Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver Output: If A > B by 200mV, RO will be high; if A < B by 200mV, RO will be low.
2 RE input Receiver Output Enable: RO is enabled when RE is low; RO is high impedance when RE is high.
3 DE input Driver Output Enable: the driver outputs, Y and Z, are enabled by bringing DE high and are high impedance when DE is low.
4 DI input Driver Input: a low on DI forces output Y low and output Z high, and a high on DI forces output Y high and output Z low.
5 GND power_in Ground.
6 A bidirectional Noninverting Receiver Input and Noninverting Driver Output.
7 B bidirectional Inverting Receiver Input and Inverting Driver Output.
8 VCC power_in Positive Supply: 4.75V ≤ VCC ≤ 5.25V.

Key specifications

Parameter Value
Manufacturer Maxim Integrated
Package SOIC-8
Category Global Sourcing Parts
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (absolute maximum) VCC 12 V 2
Control input voltage (RE, DE) -0.5 V Printed as -0.5V to (VCC + 0.5V); upper limit is VCC + 0.5V 2
Driver input voltage (DI) -0.5 V Printed as -0.5V to (VCC + 0.5V); upper limit is VCC + 0.5V 2
Driver output voltage (A, B) -8 12.5 V 2
Receiver input voltage (A, B) -8 12.5 V 2
Receiver output voltage (RO) -0.5 V Printed as -0.5V to (VCC + 0.5V); upper limit is VCC + 0.5V 2
Storage temperature range -65 160 °C 2
Lead temperature (soldering) 300 °C soldering, 10 sec 2
Operating temperature range, commercial (MAX4__C__) TA 0 70 °C Commercial grade (C suffix) 2
Differential driver output (with load) VOD2 1.5 5 V R = 27Ω (RS-485), Figure 4 2
Differential driver output (with load, RS-422) VOD2 2 V R = 50Ω (RS-422) 2
Differential driver output (no load) VOD1 5 V 2
Change in magnitude of driver differential output voltage for complementary output states ΔVOD 0.2 V R = 27Ω or 50Ω, Figure 4 2
Change in magnitude of driver common-mode output voltage for complementary output states ΔVOD 0.2 V R = 27Ω or 50Ω, Figure 4 2
Driver common-mode output voltage VOC 3 V 2
Receiver differential threshold voltage VTH -0.2 0.2 V -7V ≤ VCM ≤ 12V 2
Receiver input resistance RIN 12 kΩ -7V ≤ VCM ≤ 12V, all devices except MAX487/MAX1487 2
Receiver output low voltage VOL 0.4 V IO = 4mA, VID = -200mV 2
Receiver output high voltage VOH 3.5 V IO = -4mA, VID = 200mV 2
Three-state (high impedance) output current at receiver IOZR -1 1 µA 2
Receiver short-circuit current IOSR 7 95 mA 0V ≤ VO ≤ VCC 3
Driver short-circuit current, VO = Low IOSD2 35 250 mA -7V ≤ VO ≤ 12V (Note 4) 3
Driver short-circuit current, VO = High IOSD1 35 250 mA -7V ≤ VO ≤ 12V (Note 4) 3
Input current (DE, DI, RE) IIN1 -2 2 µA DE, DI, RE 2
Input current (A, B), low side IIN2 -0.8 mA VIN = -7V; DE = 0V; VCC = 0V or 5.25V, all devices except MAX487/MAX1487 2
Input current (A, B), high side IIN2 1 mA VIN = 12V; DE = 0V; VCC = 0V or 5.25V, all devices except MAX487/MAX1487 2
Input low voltage VIL 0.8 V DE, DI, RE 2
Input high voltage VIH 2 V DE, DI, RE 2
No-load supply current ICC 230 400 µA RE = 0V or VCC 3
No-load supply current ICC 300 500 µA RE = 0V or VCC 3
Driver input to output, low-to-high tPLH 10 30 60 ns Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF 3
Driver input to output, high-to-low tPHL 10 30 60 ns Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF 3
Driver output skew to output tSKEW 5 10 ns Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF 3
Driver rise or fall time tR, tF 3 15 40 ns Figures 6 and 8, RDIFF = 54Ω, CL1 = CL2 = 100pF 3
Driver enable to output high tZH 40 70 ns 3
Driver enable to output low tZL 40 70 ns 3
Driver disable time from high tHZ 40 70 ns 3
Driver disable time from low tLZ 40 70 ns 3
Receiver input to output tPLH, tPHL 20 90 200 ns Figures 6 and 10, RDIFF = 54Ω, CL1 = CL2 = 100pF 3
Receiver enable to output high tZH 20 50 ns 3
Receiver enable to output low tZL 20 50 ns 3
Receiver disable time from high tHZ 20 50 ns 3
Receiver disable time from low tLZ 20 50 ns 3
Maximum data rate fMAX 2.5 Mbps 3

CAD (KiCad official)

  • Symbol: MAX485CSA+
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: max485csa-etched.step / max485csa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max485csa.step / max485csa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Maxim Integrated datasheet (17 pp, sha256 b7888c0d45b0dc58, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF