component
MAX4377FASA+
Public Made by Adomby adom
Maxim Integrated Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MAX4377FASA+
Maxim Integrated · Pre-ordered Chips · SOIC-8
MAX4377FASA+ from Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Amplifier 1 buffered output voltage, proportional to the sense voltage (VRS1+ - VRS1-), approximately zero when VRS1- > VRS1+ (no phase reversal), drives up to 2mA. |
| 2 | RS1- | input | Amplifier 1 load-side connection to the external sense resistor. |
| 3 | RS1+ | input | Amplifier 1 power-side connection to the external sense resistor, common-mode range 0 to +28V independent of VCC. |
| 4 | GND | power_in | Ground. |
| 5 | RS2+ | input | Amplifier 2 power-side connection to the external sense resistor, common-mode range 0 to +28V independent of VCC. |
| 6 | RS2- | input | Amplifier 2 load-side connection to the external sense resistor. |
| 7 | OUT2 | output | Amplifier 2 buffered output voltage, proportional to the sense voltage (VRS2+ - VRS2-), approximately zero when VRS2- > VRS2+ (no phase reversal), drives up to 2mA. |
| 8 | VCC | power_in | Supply voltage, +3V to +28V operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range | VCC | 3 | 28 | V | Guaranteed by PSR test | 3 | |
| Common-Mode Input Range | VCM | 0 | 28 | V | Guaranteed by total OUT voltage error test | 3 | |
| Input Bias Current IRS+ | IRS+ | 0 | 60 | mA | VRS+ > 2.0V | 3 | |
| Input Bias Current IRS+ | IRS+ | -400 | 60 | mA | VRS+ ≤ 2.0V | 3 | |
| Input Bias Current IRS- | IRS- | 0 | 120 | mA | VRS+ > 2.0V | 3 | |
| Input Bias Current IRS- | IRS- | -800 | 120 | mA | VRS+ ≤ 2.0V | 3 | |
| Supply Current per Amplifier | ICC | 1 | 2.2 | mA | VSENSE = 5mV, VRS+ > 2.0V, VCC = 12V | 3 | |
| Total OUT Voltage Error | -6.75 | 6.75 | % | IOUT ≤ 2mA, VSENSE = 100mV, VCC = 12V, VRS+ = 12V | 3 | ||
| Total OUT Voltage Error | -3.25 | 0.5 | 3.25 | % | IOUT ≤ 2mA, VSENSE = 100mV, VCC = 12V, TA = +25°C, VRS+ = 12V | 3 | |
| Total OUT Voltage Error | -11 | 11 | % | VSENSE = 100mV, VCC = 28V, VRS+ = 28V | 3 | ||
| Total OUT Voltage Error | -5 | 0.5 | 5 | % | VSENSE = 100mV, VCC = 28V, VRS+ = 28V, TA = +25°C | 3 | |
| Total OUT Voltage Error | -32 | 9 | 32 | % | VSENSE = 100mV, VCC = 12V, VRS+ = 0.1V | 3 | |
| Total OUT Voltage Error | -7 | 7 | % | VSENSE = 6.25mV, VCC = 12V, VRS+ = 12V (Note 3) | 3 | ||
| OUT High Voltage | (VCC - VOUT) | 0.9 | 1.2 | V | VCC = 3V, IOUT = 2mA, VRS+ = 28V | 3 | |
| OUT Low Voltage | VOL | 25 | 40 | mV | IOUT = 200µA, VCC = VRS+ = 12V, VSENSE = 0V, TA = +25°C | 3 | |
| Gain Accuracy | DAV | -5.5 | 5.5 | % | VSENSE = 10mV to 150mV, VCC = 12V, IOUT = 2mA, gain = 20 and 50, VRS+ = 12V, TA = TMIN to TMAX | 4 | |
| Gain Accuracy | DAV | -2.5 | 0.5 | 2.5 | % | TA = +25°C; VSENSE = 10mV to 150mV, VCC = 12V, IOUT = 2mA, gain = 20 and 50, VRS+ = 12V | 4 |
| Power-Supply Rejection | PSR | 66 | 90 | dB | VRS+ > 2V, VOUT = 1.6V, VCC = 3V to 28V | 4 | |
| Common-Mode Rejection | CMR | 90 | dB | 2V ≤ VRS+ ≤ 28V, VSENSE = 100mV | 3 | ||
| Leakage Current | IRS+, IRS- | 8 | mA | VCC = 0V, VRS+ = 28V | 3 | ||
| Full-Scale Sense Voltage | VSENSE | 150 | mV | 3 | |||
| Bandwidth | BW | 1.7 | MHz | VCC = 12V, VRS+ = 12V, CLOAD = 15pF, VSENSE = 100mV (gain = +50V/V) | 4 | ||
| Slew Rate | SR | 10 | V/µs | VSENSE = 20mV to 100mV, CLOAD = 15pF | 4 | ||
| Gain | AV | 50 | V/V | MAX437_F | 4 | ||
| OUT Setting Time to 1% of Final Value | 400 | ns | VCC = 12V, VRS+ = 12V, CLOAD = 15pF, VSENSE = 6.25mV to 100mV | 4 | |||
| OUT Setting Time to 1% of Final Value | 800 | ns | VCC = 12V, VRS+ = 12V, CLOAD = 15pF, VSENSE = 100mV to 6.25mV | 4 | |||
| Maximum Capacitive Load | CLOAD | 1000 | pF | No sustained oscillation | 4 | ||
| Output Resistance | ROUT | 5 | W | VSENSE = 100mV | 4 | ||
| Power-Up Time to 1% of Final Value | 2 | µs | VSENSE = 100mV, CLOAD = 15pF | 4 | |||
| Saturation Recovery Time to 1% of Final Value | 1 | µs | VCC = 12V, VRS+ = 12V, CLOAD = 15pF, VSENSE = 100mV | 4 | |||
| Reverse Recovery Time to 1% of Final Value | 1 | µs | VCC = 12V, VRS_ = 12V, CLOAD = 15pF, VSENSE = -100mV to +100mV | 4 | |||
| VCC, RS+, RS- to GND | VCC, VRS+, VRS- | -0.3 | 30 | V | Relative to GND | 2 | |
| OUT to GND | VOUT | -0.3 | V | Upper limit printed as (VCC + 0.3V) | 2 | ||
| Differential Input Voltage | VRS+ - VRS- | -8 | 8 | V | 2 | ||
| Current into Any Pin | -20 | 20 | mA | 2 | |||
| Output Short Circuit to GND | 1 | s | 2 | ||||
| Operating Temperature Range | TA | -40 | 125 | °C | 2 | ||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Lead Temperature (soldering, 10s) | 300 | °C | Soldering, 10s | 2 | |||
| Soldering Temperature (reflow) | 260 | °C | Reflow | 2 |
CAD (KiCad official)
- Symbol:
MAX4377FASA+ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
max4377fasa-etched.step/max4377fasa-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max4377fasa.step/max4377fasa.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Maxim Integrated datasheet (13 pp, sha256
3360027ba7d5a1da, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MAX4377FASA+
**Maxim Integrated** · Pre-ordered Chips · SOIC-8
MAX4377FASA+ from Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Amplifier 1 buffered output voltage, proportional to the sense voltage (VRS1+ - VRS1-), approximately zero when VRS1- > VRS1+ (no phase reversal), drives up to 2mA. |
| 2 | RS1- | input | Amplifier 1 load-side connection to the external sense resistor. |
| 3 | RS1+ | input | Amplifier 1 power-side connection to the external sense resistor, common-mode range 0 to +28V independent of VCC. |
| 4 | GND | power_in | Ground. |
| 5 | RS2+ | input | Amplifier 2 power-side connection to the external sense resistor, common-mode range 0 to +28V independent of VCC. |
| 6 | RS2- | input | Amplifier 2 load-side connection to the external sense resistor. |
| 7 | OUT2 | output | Amplifier 2 buffered output voltage, proportional to the sense voltage (VRS2+ - VRS2-), approximately zero when VRS2- > VRS2+ (no phase reversal), drives up to 2mA. |
| 8 | VCC | power_in | Supply voltage, +3V to +28V operating range. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Maxim Integrated |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range | VCC | 3 | | 28 | V | Guaranteed by PSR test | 3 |
| Common-Mode Input Range | VCM | 0 | | 28 | V | Guaranteed by total OUT voltage error test | 3 |
| Input Bias Current IRS+ | IRS+ | 0 | | 60 | mA | VRS+ > 2.0V | 3 |
| Input Bias Current IRS+ | IRS+ | -400 | | 60 | mA | VRS+ ≤ 2.0V | 3 |
| Input Bias Current IRS- | IRS- | 0 | | 120 | mA | VRS+ > 2.0V | 3 |
| Input Bias Current IRS- | IRS- | -800 | | 120 | mA | VRS+ ≤ 2.0V | 3 |
| Supply Current per Amplifier | ICC | | 1 | 2.2 | mA | VSENSE = 5mV, VRS+ > 2.0V, VCC = 12V | 3 |
| Total OUT Voltage Error | | -6.75 | | 6.75 | % | IOUT ≤ 2mA, VSENSE = 100mV, VCC = 12V, VRS+ = 12V | 3 |
| Total OUT Voltage Error | | -3.25 | 0.5 | 3.25 | % | IOUT ≤ 2mA, VSENSE = 100mV, VCC = 12V, TA = +25°C, VRS+ = 12V | 3 |
| Total OUT Voltage Error | | -11 | | 11 | % | VSENSE = 100mV, VCC = 28V, VRS+ = 28V | 3 |
| Total OUT Voltage Error | | -5 | 0.5 | 5 | % | VSENSE = 100mV, VCC = 28V, VRS+ = 28V, TA = +25°C | 3 |
| Total OUT Voltage Error | | -32 | 9 | 32 | % | VSENSE = 100mV, VCC = 12V, VRS+ = 0.1V | 3 |
| Total OUT Voltage Error | | -7 | | 7 | % | VSENSE = 6.25mV, VCC = 12V, VRS+ = 12V (Note 3) | 3 |
| OUT High Voltage | (VCC - VOUT) | | 0.9 | 1.2 | V | VCC = 3V, IOUT = 2mA, VRS+ = 28V | 3 |
| OUT Low Voltage | VOL | | 25 | 40 | mV | IOUT = 200µA, VCC = VRS+ = 12V, VSENSE = 0V, TA = +25°C | 3 |
| Gain Accuracy | DAV | -5.5 | | 5.5 | % | VSENSE = 10mV to 150mV, VCC = 12V, IOUT = 2mA, gain = 20 and 50, VRS+ = 12V, TA = TMIN to TMAX | 4 |
| Gain Accuracy | DAV | -2.5 | 0.5 | 2.5 | % | TA = +25°C; VSENSE = 10mV to 150mV, VCC = 12V, IOUT = 2mA, gain = 20 and 50, VRS+ = 12V | 4 |
| Power-Supply Rejection | PSR | 66 | 90 | | dB | VRS+ > 2V, VOUT = 1.6V, VCC = 3V to 28V | 4 |
| Common-Mode Rejection | CMR | | 90 | | dB | 2V ≤ VRS+ ≤ 28V, VSENSE = 100mV | 3 |
| Leakage Current | IRS+, IRS- | | 8 | | mA | VCC = 0V, VRS+ = 28V | 3 |
| Full-Scale Sense Voltage | VSENSE | | 150 | | mV | | 3 |
| Bandwidth | BW | | 1.7 | | MHz | VCC = 12V, VRS+ = 12V, CLOAD = 15pF, VSENSE = 100mV (gain = +50V/V) | 4 |
| Slew Rate | SR | | 10 | | V/µs | VSENSE = 20mV to 100mV, CLOAD = 15pF | 4 |
| Gain | AV | | 50 | | V/V | MAX437_F | 4 |
| OUT Setting Time to 1% of Final Value | | | 400 | | ns | VCC = 12V, VRS+ = 12V, CLOAD = 15pF, VSENSE = 6.25mV to 100mV | 4 |
| OUT Setting Time to 1% of Final Value | | | 800 | | ns | VCC = 12V, VRS+ = 12V, CLOAD = 15pF, VSENSE = 100mV to 6.25mV | 4 |
| Maximum Capacitive Load | CLOAD | | 1000 | | pF | No sustained oscillation | 4 |
| Output Resistance | ROUT | | 5 | | W | VSENSE = 100mV | 4 |
| Power-Up Time to 1% of Final Value | | | 2 | | µs | VSENSE = 100mV, CLOAD = 15pF | 4 |
| Saturation Recovery Time to 1% of Final Value | | | 1 | | µs | VCC = 12V, VRS+ = 12V, CLOAD = 15pF, VSENSE = 100mV | 4 |
| Reverse Recovery Time to 1% of Final Value | | | 1 | | µs | VCC = 12V, VRS_ = 12V, CLOAD = 15pF, VSENSE = -100mV to +100mV | 4 |
| VCC, RS+, RS- to GND | VCC, VRS+, VRS- | -0.3 | | 30 | V | Relative to GND | 2 |
| OUT to GND | VOUT | -0.3 | | | V | Upper limit printed as (VCC + 0.3V) | 2 |
| Differential Input Voltage | VRS+ - VRS- | -8 | | 8 | V | | 2 |
| Current into Any Pin | | -20 | | 20 | mA | | 2 |
| Output Short Circuit to GND | | | | 1 | s | | 2 |
| Operating Temperature Range | TA | -40 | | 125 | °C | | 2 |
| Junction Temperature | TJ | | | 150 | °C | | 2 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 2 |
| Lead Temperature (soldering, 10s) | | | | 300 | °C | Soldering, 10s | 2 |
| Soldering Temperature (reflow) | | | | 260 | °C | Reflow | 2 |
## CAD (KiCad official)
- Symbol: `MAX4377FASA+`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `max4377fasa-etched.step` / `max4377fasa-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `max4377fasa.step` / `max4377fasa.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Maxim Integrated datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/max4376-max4378.pdf) (13 pp, sha256 `3360027ba7d5a1da`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/max4377fasa-datasheet.pdf)