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MAX4163ESA+T
Public Made by Adomby adom
Analog Devices Inc Maxim Integrated Operational Amplifier, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMAX4163ESA+T
Analog Devices Inc Maxim Integrated · Operational Amplifier · SO-8
MAX4163ESA+T from Analog Devices Inc Maxim Integrated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Amplifier A output; the output voltage must stay within the absolute maximum range of (VSS - 0.3V) to (VDD + 0.3V). |
| 2 | INA- | input | Amplifier A inverting input; input voltage must stay within the absolute maximum range of (VSS - 0.3V) to (VDD + 0.3V). |
| 3 | INA+ | input | Amplifier A noninverting input; input voltage must stay within the absolute maximum range of (VSS - 0.3V) to (VDD + 0.3V), and the common-mode range extends 250mV beyond either supply rail. |
| 4 | VSS | power_in | Negative power supply; the device operates from a single supply of 2.5V to 10V (VSS = 0V in single-supply use) or from dual supplies of ±1.25V to ±5V. |
| 5 | INB+ | input | Amplifier B noninverting input; input voltage must stay within the absolute maximum range of (VSS - 0.3V) to (VDD + 0.3V), and the common-mode range extends 250mV beyond either supply rail. |
| 6 | INB- | input | Amplifier B inverting input; input voltage must stay within the absolute maximum range of (VSS - 0.3V) to (VDD + 0.3V). |
| 7 | OUTB | output | Amplifier B output; the output voltage must stay within the absolute maximum range of (VSS - 0.3V) to (VDD + 0.3V), and the output is internally short-circuit protected to either rail. |
| 8 | VDD | power_in | Positive power supply; the supply voltage (VDD to VSS) must not exceed 11V absolute maximum, and the operating range is 2.5V to 10V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | SO-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage Range (3V table) | VDD | 2.5 | 10 | V | Inferred from PSRR test | 2 | |
| Supply Current (Per Amplifier) | IDD | 25 | 40 | µA | VDD = 3V, TA = -40°C to +85°C | 2 | |
| Input Bias Current | IB | 1 | 100 | pA | VDD = 3V; Note 2 (guaranteed by design, not production tested) | 2 | |
| Input Offset Voltage (MAX4163) | VOS | -4 | 0.5 | 4 | mV | VDD = 3V, TA = +25°C | 2 |
| Input Offset Voltage (MAX4163) | VOS | -5 | 5 | mV | VDD = 3V, TA = -40°C to +85°C | 2 | |
| Input Common-Mode Voltage Range | VCM | -0.25 | 0.25 | V | VDD = 3V; printed as VSS - 0.25 to VDD + 0.25; inferred from CMRR test | 2 | |
| Common-Mode Rejection Ratio | CMRR | 70 | 100 | dB | VDD = 3V; VCM = (VSS - 0.25V) to (VDD + 0.25V) | 2 | |
| Large-Signal Voltage Gain | AV | 85 | 120 | dB | VDD = 3V; RL = 10kΩ | 2 | |
| Output Voltage Swing (high side) | VDD - VOH | 30 | 180 | mV | VDD = 3V; RL = 10kΩ | 2 | |
| Output Voltage Swing (low side) | VOL - VSS | 30 | 180 | mV | VDD = 3V; RL = 10kΩ | 2 | |
| Output Voltage Swing (high side) | VDD - VOH | 3 | 25 | mV | VDD = 3V; RL = 100kΩ | 2 | |
| Output Voltage Swing (low side) | VOL - VSS | 3 | 25 | mV | VDD = 3V; RL = 100kΩ | 2 | |
| Power-Supply Rejection Ratio | PSRR | 80 | 110 | dB | VDD = 2.5V to 10V | 2 | |
| Operating Voltage Range (5V table) | VDD | 4.5 | 10 | V | Inferred from PSRR test | 3 | |
| Supply Current (Per Amplifier) | IDD | 25 | 45 | µA | VDD = 5V, TA = -40°C to +85°C | 3 | |
| Input Bias Current | IB | 1 | 100 | pA | VDD = 5V; Note 2 (guaranteed by design, not production tested) | 3 | |
| Input Offset Voltage (MAX4163) | VOS | -4 | 0.5 | 4 | mV | VDD = 5V, TA = +25°C | 3 |
| Input Offset Voltage (MAX4163) | VOS | -5 | 5 | mV | VDD = 5V, TA = -40°C to +85°C | 3 | |
| Input Common-Mode Voltage Range | VCM | -0.25 | 0.25 | V | VDD = 5V; printed as VSS - 0.25 to VDD + 0.25; inferred from CMRR test | 3 | |
| Common-Mode Rejection Ratio | CMRR | 70 | 100 | dB | VDD = 5V; VCM = (VSS - 0.25V) to (VDD + 0.25V) | 3 | |
| Large-Signal Voltage Gain | AV | 85 | 120 | dB | VDD = 5V; RL = 10kΩ | 3 | |
| Output Voltage Swing (high side) | VDD - VOH | 50 | 300 | mV | VDD = 5V; RL = 10kΩ | 3 | |
| Output Voltage Swing (low side) | VOL - VSS | 50 | 300 | mV | VDD = 5V; RL = 10kΩ | 3 | |
| Output Voltage Swing (high side) | VDD - VOH | 5 | 40 | mV | VDD = 5V; RL = 100kΩ | 3 | |
| Output Voltage Swing (low side) | VOL - VSS | 5 | 40 | mV | VDD = 5V; RL = 100kΩ | 3 | |
| Power-Supply Rejection Ratio | PSRR | 80 | 110 | dB | VDD = 4.5V to 10V | 3 | |
| IN+, IN-, OUT Voltage | -0.3 | 0.3 | V | Printed as (VSS - 0.3V) to (VDD + 0.3V) | 2 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | 2 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Lead Temperature (soldering, 10s) | 300 | °C | 10 s soldering | 2 |
CAD (KiCad official)
- Symbol:
MAX4163ESA+T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
max4163esa-t-etched.step/max4163esa-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max4163esa-t.step/max4163esa-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc Maxim Integrated datasheet (13 pp, sha256
f47a2b5bfe83118e, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).