component

MAX3442EESA+T

Public Made by Adom

by adom

Analog Devices Inc Maxim Integrated RS-485 / RS-422 ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterfacemax3442eesa+tfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
max3442eesa-t / README.md
History Download
Ray Publish 0.1.0 f6532e4 8d ago

MAX3442EESA+T

Analog Devices Inc Maxim Integrated · RS-485 / RS-422 ICs · SOIC-8

MAX3442EESA+T from Analog Devices Inc Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output: when the receiver is enabled and (A-B) ≥ -50mV, RO is high; when (A-B) ≤ -200mV, RO is low.
2 RE input Receiver output enable: pull RE low to enable RO (the receiver is three-stated when RE is high).
3 DE input Driver output enable: force DE high to enable the driver, pull DE low to three-state the driver outputs, and drive RE high with DE low to enter low-power shutdown.
4 DI input Driver input: a logic-low on DI forces the noninverting output (A) low and the inverting output (B) high, and a logic-high on DI forces A high and B low.
5 GND power_in Ground reference for the device.
6 A bidirectional Noninverting receiver input and driver output; protected to ±60V fault voltage and ±15kV HBM ESD.
7 B bidirectional Inverting receiver input and driver output; protected to ±60V fault voltage and ±15kV HBM ESD.
8 VCC power_in Positive supply, VCC = +4.75V to +5.25V.

Key specifications

Parameter Value
Manufacturer Analog Devices Inc Maxim Integrated
Package SOIC-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC (absolute maximum) VCC 7 V 2
FAULT, DE/RE, RE, DE, DI, TXD voltage referenced to GND -0.3 V 2
A, B voltage (fault protection) -60 60 V 2
RO voltage referenced to GND -0.3 V 2
Operating temperature range MAX344_EE_ _ TA -40 85 °C EE grade 2
Storage temperature range TSTG -65 150 °C 2
Junction temperature TJ 150 °C 2
Lead temperature (soldering) 300 °C 10s 2
Soldering temperature (reflow) 260 °C 2
Supply voltage VCC (recommended operating) VCC 4.75 5.25 V 2
Differential driver output VOD VOD 2 V Figure 1, RL = 100Ω 2
Differential driver output VOD VOD 1.5 V Figure 1, RL = 54Ω 2
Change in magnitude of differential output voltage ΔVOD 0.2 V Figure 1, RL = 100Ω or 54Ω (Note 2) 2
Driver common-mode output voltage VOC 3 V Figure 1, RL = 100Ω or 54Ω 2
Change in magnitude of common-mode voltage ΔVOC 0.2 V Figure 1, RL = 100Ω or 54Ω (Note 2) 2
Driver input high voltage VDIH 2 V 2
Driver input low voltage VDIL 0.8 V 2
Driver input current IDIN -2 2 µA 2
Driver short-circuit output current IOSD 350 mA 0V ≤ VOUT ≤ +12V (Note 3) 2
Driver short-circuit output current IOSD -350 mA -7V ≤ VOUT ≤ VCC (Note 3) 2
Driver short-circuit foldback output current IOSDF 25 mA (VCC - 1V) ≤ VOUT ≤ +12V (Note 3) 2
Driver short-circuit foldback output current IOSDF -25 mA -7V ≤ VOUT ≤ +1V (Note 3) 2
Receiver input current IA,B 250 µA VCC = GND, VA, B = 12V 2
Receiver input current IA,B -150 µA VA, B = -7V 2
Receiver input current IA,B -6 6 mA VA, B = ±60V 2
Receiver differential threshold voltage VTH -200 -50 mV -7V ≤ VCM ≤ +12V 2
Overvoltage protection -60 60 V A, B; RSOURCE = 0, RL = 54Ω 3
ESD protection HBM -15 15 kV A, B Human Body Model 3
Receiver differential threshold (fault detection, high limit) FDIPH 270 450 mV VCM = 0V, high limit 3
Receiver differential threshold (fault detection, low limit) FDIPL -450 -270 mV VCM = 0V, low limit 3
Fault-detection common-mode input voltage positive 12 V 3
Fault-detection common-mode input voltage negative -7 V 3
Receiver output low voltage VOL 0.4 V Figure 2, IOL = 1mA 3
Three-state output current at receiver IOZR -1 1 µA 0V ≤ VA, B ≤ VCC 3
Receiver input resistance RIN 48 kΩ -7V ≤ VCM ≤ +12V 3
Receiver output short-circuit current IOSR -95 95 mA 0V ≤ VRO ≤ VCC 3
Control input high voltage VCIH 2 V DE, DE, RE, DE/RE 3
Input current latch during first rising edge IIN 90 µA DE, DE/RE, RE 3
Supply current normal operation IQ 30 mA No load, DI = VCC or GND, MAX3442E (DE = VCC, RE = GND) 3
Supply current in shutdown mode ISHDN 20 µA DE = GND, RE = VCC (MAX3442E/MAX3443E) 3
Driver propagation delay tPLHA, tPLHB 2000 ns Figure 3, RL = 54Ω, CL = 50pF 4
Driver differential propagation delay tDPLH, tDPHL 2000 ns Figure 4, RL = 54Ω, CL = 50pF 4
Driver differential output transition time tLH, tHL 200 2000 ns Figure 4, RL = 54Ω, CL = 50pF 4
Differential driver output skew tDSKEW 200 ns RL = 54Ω, CL = 50pF, tDSKEW = /tDPLH - tDPHL/ 4
Maximum data rate fMAX 250 kbps 4
Driver enable time to output high tPDZH 2000 ns Figure 5, RL = 500Ω, CL = 50pF 4
Driver disable time from output high tPDHZ 2000 ns Figure 5, RL = 500Ω, CL = 50pF 4
Driver enable time from shutdown to output high tPDHS 4.2 µs Figure 5, RL = 500Ω, CL = 50pF (MAX3442E/MAX3444E) 4
Driver enable time to output low tPDZL 2000 ns Figure 6, RL = 500Ω, CL = 50pF 4
Driver disable time from output low tPDLZ 2000 ns Figure 6, RL = 500Ω, CL = 50pF 4
Driver enable time from shutdown to output low tPDLS 4.2 µs Figure 6, RL = 500Ω, CL = 50pF (MAX3442E/MAX3444E) 4
Driver time to shutdown tSHDN 800 ns RL = 500Ω, CL = 50pF (MAX3442E/MAX3444E) 4
Receiver propagation delay tRPLH, tRPHL 2000 ns Figure 7, CL = 20pF, VID = 2V, VCM = 0V 4
Receiver enable time to output high tRPZH 2000 ns Figure 8, RL = 1kΩ, CL = 20pF 4
Receiver disable time from output high tRPHZ 2000 ns Figure 8, RL = 1kΩ, CL = 20pF 4
Receiver wake time from shutdown tRPWAKE 4.2 µs Figure 8, RL = 1Ω, CL = 20pF (MAX3442E/MAX3444E) 4
Receiver enable time to output low tRPZL 2000 ns Figure 8, RL = 1kΩ, CL = 20pF 4
Receiver disable time from output low tRPLZ 2000 ns Figure 8, RL = 1Ω, CL = 20pF 4
Receiver time to shutdown tSHDN 800 ns RL = 50Ω, CL = 50pF (MAX3442E/MAX3444E) 4

CAD (KiCad official)

  • Symbol: MAX3442EESA+T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: max3442eesa-t-etched.step / max3442eesa-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max3442eesa-t.step / max3442eesa-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc Maxim Integrated datasheet (19 pp, sha256 200c60b95dbac71f, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF