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MAX30003CTI+

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Maxim Integrated Pre-ordered Chips, QFN-28-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsmax30003cti+factory-2.0.0extractor-text

Verified MAX30003CTI+

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 29 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MAX30003CTI+ · QFN-28-EP(5x5) · 29 pins
  • ✓copper: 29 copper pads, none touching another net
  • ✓datasheet: all 29 pin names found in the 46-page datasheet
  • ✓distributor: lcsc C1519515, digikey MAX30003CTI+-ND, mouser 700-MAX30003CTI+
  • ✓family: QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ccghzsgt/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 29 pins = 29 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 29 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ max30003cti.kicad_sym✓ max30003cti.kicad_mod✓ max30003cti.step
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Ray Publish 0.1.0 6fff61d 10d ago

MAX30003CTI+

Maxim Integrated · Pre-ordered Chips · QFN-28-EP(5x5)

MAX30003CTI+ from Maxim Integrated, in a QFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I.C. passive Internally connected; connect to AGND.
2 I.C. passive Internally connected; connect to AGND.
3 AGND power_in Analog power and reference ground; connect into the printed circuit board ground plane.
4 I.C. passive Internally connected; connect to AGND.
5 I.C. passive Internally connected; connect to AGND.
6 ECGP input ECG positive input.
7 ECGN input ECG negative input.
8 AGND power_in Analog power and reference ground; connect into the printed circuit board ground plane.
9 CAPP passive Analog high-pass filter input; connect a 1μF X7R capacitor (CHPF) between CAPP and CAPN to form a 0.5Hz high-pass response in the ECG channel.
10 CAPN passive Analog high-pass filter input; connect a 1μF X7R capacitor (CHPF) between CAPP and CAPN to form a 0.5Hz high-pass response in the ECG channel.
11 CPLL passive PLL loop filter input; connect a 1nF COG capacitor between CPLL and AGND.
12 DGND power_in Digital ground for both digital core and I/O pad drivers; recommended to connect to the AGND plane.
13 DVDD power_in Digital core supply voltage; connect to AVDD.
14 FCLK input External 32.768kHz clock that controls the sampling of the internal sigma-delta converters and decimator.
15 CSB input Active-low chip-select input that enables the serial interface.
16 SCLK input Serial clock input that clocks data in and out of the serial interface when CSB is low.
17 SDI input Serial data input, sampled into the device on the rising edge of SCLK when CSB is low.
18 SDO tri_state Serial data output that changes state on the falling edge of SCLK when CSB is low and is three-stated when CSB is high.
19 OVDD power_in Logic interface supply voltage.
20 INT2B output Interrupt 2 output, active-low status output that can be used to interrupt an external device.
21 INTB output Interrupt output, active-low status output that can be used to interrupt an external device.
22 AVDD power_in Analog core supply voltage; connect to DVDD.
23 VREF power_out ADC reference buffer output; connect a 10μF X5R ceramic capacitor between VREF and AGND.
24 I.C. passive Internally connected; connect to AGND.
25 VCM power_out Common mode buffer output; connect a 10μF X5R ceramic capacitor between VCM and AGND.
26 I.C. passive Internally connected; connect to AGND.
27 VBG passive Bandgap noise filter output; connect a 1.0μF X7R ceramic capacitor between VBG and AGND.
28 AGND power_in Analog power and reference ground; connect into the printed circuit board ground plane.
29 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Maxim Integrated
Package QFN-28-EP(5x5)
Category Interface ICs
Pins 29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
AC Differential Input Range -15 15 mVp-p VAVDD = +1.1V, THD < 0.3% 3
DC Differential Input Range -300 300 mV VAVDD = +1.1V, shift from nominal gain < 2% 3
Common Mode Input Range -150 150 mV VAVDD = +1.1V, from VMID, shift from nominal gain < 2% 3
Common Mode Rejection Ratio CMRR 105 115 dB 0W source impedance, f = 64Hz (Note 3) 3
Input Leakage Current -1 0.1 1 nA TA = +25°C 3
ECG Channel Gain Error -2.5 2.5 % VAVDD = +1.8V, GCH = 20x, ECGP = ECGN = VMID 4
ECG Channel Gain Error -4.5 4.5 % VAVDD = +1.1V, GCH = 20x, ECGP = ECGN = VMID 4
CAPP to CAPN Impedance RHPF 320 450 600 kΩ FHP = 1/(2R x RHPF x CHPF) 4
Calibration Voltage Magnitude Error -2 2 % Single-ended (Note 9) 5
VREF Output Voltage VREF 0.995 1 1.005 V TA = +25°C 5
External VREF Compensation Capacitor CREF 1 10 µF 6
External VCM Compensation Capacitor CCM 1 10 µF 6
Input-Voltage High VIH 0.7 xVOVDD SDI, SCLK, CSB, FCLK 6
Input-Voltage Low VIL 0.3 xVOVDD SDI, SCLK, CSB, FCLK 6
Input Current IIN -1 1 µA 6
Output Voltage Low VOL 0.4 V ISINK = 1mA 6
Three-State Leakage Current -1 1 µA 6
Analog Supply Voltage VAVDD 1.1 2 V Connect VAVDD to VDVDD 6
Digital Supply Voltage VDVDD 1.1 2 V Connect VDVDD to VAVDD 6
Interface Supply Voltage VOVDD 1.65 3.6 V Power for I/O drivers only 6
Supply Current, ECG channel IAVDD + IDVDD 109 120 µA VAVDD = VDVDD = +2.0V 6
Supply Current, ULP Lead On Detect IAVDD + IDVDD 0.73 2.5 µA TA = +25°C 6
Interface Supply Current IOVDD 0.6 1.6 µA VOVDD = +3.6V, ECG channel at 512sps (Note 10) 6
Shutdown Current ISAVDD + ISDVDD 0.51 2.5 µA VAVDD = VDVDD = 2.0V, TA = +25°C (Note 5) 7
SCLK Frequency fSCLK 0 12 MHz 7
SCLK Period tCP 83 ns 7
SCLK Pulse Width High tCH 15 ns 7
SCLK Pulse Width Low tCL 15 ns 7
CSB Fall to SCLK Rise Setup Time tCSS0 15 ns To 1st SCLK rising edge (RE) 7
CSB Fall to SCLK Rise Hold Time tCSH0 0 ns Applies to inactive RE preceding 1st RE 7
CSB Rise to SCLK Rise Hold Time tCSH1 10 ns Applies to 32nd RE, executed write 7
CSB Rise to SCLK Rise tCSA 15 ns Applies to 32nd RE, aborted write sequence 7
SCLK Rise to CSB Fall tCSF 100 ns Applies to 32nd RE 7
CSB Pulse-Width High tCSPW 20 ns 7
SDI-to-SCLK Rise Setup Time tDS 8 ns 7
SDI to SCLK Rise Hold Time tDH 8 ns 7
SCLK Fall to SDO Transition tDOT 40 ns CLOAD = 20pf 7
SCLK Fall to SDO Hold tDOH 2 ns CLOAD = 20pf 7
CSB Fall to SDO Fall tDOE 30 ns Enable time, CLOAD = 20pf 8
CSB Rise to SDO Hi-Z tDOZ 35 ns Disable time 8
AVDD to AGND -0.3 2 V 3
DVDD to DGND -0.3 2 V 3
AVDD to DVDD -0.3 0.3 V 3
OVDD to DGND -0.3 3.6 V 3
AGND to DGND -0.3 0.3 V 3
CSB, SCLK, SDI, FCLK to DGND -0.3 3.6 V 3
Maximum Current into Any Pin -50 50 mA 3
Operating Temperature Range 0 70 °C 3
Junction Temperature 150 °C 3
Storage Temperature Range -65 150 °C 3
Lead Temperature (Soldering, 10sec) 300 °C 3
Soldering Temperature (reflow) 260 °C 3
Junction-to-Case Thermal Resistance θJC 2 °C/W TQFN 3
VREF Temperature Coefficient TCREF 10 ppm/°C TA = 0°C to +70°C 5
Input Hysteresis VHYS 0.05 xVOVDD 6
Supply Current, ECG channel IAVDD + IDVDD 100 µA VAVDD = VDVDD = +1.8V 6

CAD (KiCad official)

  • Symbol: MAX30003CTI+
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: QFN-28-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: max30003cti-etched.step / max30003cti-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max30003cti.step / max30003cti.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Maxim Integrated datasheet (46 pp, sha256 b582db39d36ad329, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF