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MAX1873SEEE+T

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Analog Devices Inc Maxim Integrated Battery Management, QSOP-16-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MAX1873SEEE+T

Analog Devices Inc Maxim Integrated · Battery Management · QSOP-16-150mil

MAX1873SEEE+T from Analog Devices Inc Maxim Integrated, in a QSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CSSN input Source current-sense negative input: connect a current-sense resistor between CSSP and CSSN to limit total input current, or connect CSSN to CSSP to disable input current sensing.
2 CSSP input Source current-sense positive input, also used for input source undervoltage sensing, with a CSSP-to-CSSN current-sense voltage of 90mV to 110mV for 6V < VCSSP < 28V.
3 CCS passive Input-source-current regulation loop compensation point, where a 47nF capacitor to GND provides suitable performance for most applications.
4 CCV passive Battery regulation voltage control-loop compensation point; pulling CCV high to VL through a 1.5kΩ resistor disables the voltage loop for charging NiCd or NiMH batteries.
5 CCI passive Battery charge-current control-loop compensation point, where a 47nF capacitor to GND provides suitable performance for most applications.
6 ICHG/EN input Battery charging-current adjust and shutdown input: connecting it to REF sets the CSB-BATT threshold to 200mV, and pulling it below 500mV disables charging.
7 IOUT output Charge current monitor output giving VIOUT = 20(VCSB - VBATT), or 4V at a 200mV current-sense voltage, with a maximum load capacitance of 5nF.
8 VADJ input Battery regulation voltage adjust input, setting 3.979V to 4.421V per cell with 1% resistors, with the 0 to VREF input range.
9 REF power_out 4.2V reference voltage output that must be bypassed to GND with a 1µF ceramic capacitor.
10 BATT input Battery voltage-sense input and battery current-sense negative input, bypassed to GND with 68µF (MAX1873R), 47µF (MAX1873S) or 33µF (MAX1873T) capacitors with ESR < 1Ω.
11 CSB input Battery current-sense positive input, with the charge current sensed across RCSB between CSB and BATT.
12 GND power_in Ground.
13 VH power_out Internal VH regulator output that supplies power to the EXT driver, with a 0.22µF ceramic capacitor connected between VH and DCIN.
14 EXT output Drive output for the external P-channel MOSFET, swinging from VDCIN to VDCIN - 5V.
15 DCIN power_in Power-supply input for the charger IC, bypassed to GND with a 0.22µF ceramic capacitor, with an input voltage range of 6V to 28V.
16 VL power_out Internal VL regulator output that powers the control logic at 5.4V, bypassed to GND with a 2.2µF or larger ceramic capacitor, and may supply external circuitry up to 3mA.

Key specifications

Parameter Value
Manufacturer Analog Devices Inc Maxim Integrated
Package QSOP-16-150mil
Category Power Management (PMIC)
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DCIN Input Voltage Range 6 28 V 4
DCIN Quiescent Supply Current 7 mA 6.0V < VDCIN < 28V 4
DCIN Quiescent Supply Current 10 µA DCIN ≤ BATT 4
DCIN to BATT Undervoltage Threshold (falling) 0.05 0.2 V CSSP = DCIN, input falling 4
DCIN to BATT Undervoltage Threshold (rising) 0.22 0.38 V CSSP = DCIN, input rising 4
VL Output Voltage 5.15 5.65 V 6.0V < VDCIN < 28V 4
VL Output Load Regulation 50 mV IVL = 0 to 3mA 4
REF Output Voltage 4.179 4.221 V IREF = 21µA (200kΩ load) 4
REF Line Regulation 6 mV 6.0V < VDCIN < 28V 4
REF Line Regulation 65 ppm/V 6.0V < VDCIN < 28V 4
REF Load Regulation 13 mV IREF = 0 to 1mA 4
PWM Oscillator Frequency 270 330 kHz 4
EXT Driver Source On-Resistance 7 Ω 4
EXT Driver Sink On-Resistance 4.5 Ω 4
VH Output Voltage 4.75 5.75 V DCIN - VH, 6V < VDCIN < 28V, IVH = 0 to 20mA 4
CSSN/CSSP Input Current 200 µA VCSSN/VCSSP = 28V, VDCIN = 28V 4
CSSN/CSSP Off-State Leakage 5 µA VDCIN = VCSSP = 18V, VBATT = VCSB = 18V 4
BATT, CSB Input Current 1 µA ICHG/EN = 0 (charger disabled) 4
BATT, CSB Input Current 500 µA ICHG/EN = REF (charger enabled) 4
BATT, CSB Input Current 5 µA DCIN ≤ BATT (input power removed) 4
BATT Overvoltage Cutoff Threshold 15.675 17.325 V MAX1873S (3-cell version) 4
Battery Regulation Voltage 11.847 12.027 V MAX1873S (3 Li+ cells), VVADJ = 0 4
Battery Regulation Voltage 12.505 12.695 V MAX1873S (3 Li+ cells), VVADJ = VREF/2 4
Battery Regulation Voltage 13.163 13.363 V MAX1873S (3 Li+ cells), VVADJ = VREF (Note 1) 4
BATT Undervoltage Threshold 7.2 7.8 V MAX1873S, For ICHG/20 trickle charge 5
CSB to BATT Battery Current-Sense Voltage 190 210 mV VICHG/EN = VREF 5
CSB to BATT Battery Current-Sense Voltage 40 60 mV VICHG/EN = VREF/4 5
CSB to BATT Current-Sense Voltage when VBATT < 2.5V per Cell 5 15 mV when VBATT < 2.5V per cell 5
CSSP to CSSN Current-Sense Voltage 90 110 mV 6V < VCSSP < 28V 5
ICHG/EN Input Threshold 500 700 mV Includes 50mV of hysteresis 5
ICHG/EN Input Voltage Range for Charge Current Adjustment 700 mV 5
VADJ Input Current -100 100 nA VVADJ = VREF/2 5
ICHG/EN Input Current -100 100 nA VICHG/EN = VREF 5
VADJ Input Voltage Range 0 V 5
IOUT Voltage (full scale) 3.6 4.4 V VCSB - VBATT = 200mV, 0 < IOUT < 500µA 5
IOUT Voltage (25% scale) 0.9 1.1 V VCSB - VBATT = 50mV, 0 < IOUT < 500µA 5
IOUT Voltage (trickle charge) 75 325 mV VCSB - VBATT = 10mV 5
IOUT Voltage (no charge current) 40 90 mV VCSB - VBATT = 0, IIOUT = sinking 20µA 5
DCIN to GND (CSSP, CSSN, DCIN) -0.3 30 V 2
VL, ICHG/EN to GND -0.3 6 V 2
VH, EXT to DCIN -6 0.3 V 2
VH, EXT to GND -0.3 V 2
EXT to VH -0.3 6 V 2
DCIN to VL -0.3 30 V 2
VADJ, REF, CCI, CCV, CCS, IOUT to GND -0.3 V 2
BATT, CSB to GND -0.3 20 V 2
CSSP to CSSN -0.3 0.6 V 2
CSB to BATT -0.3 0.6 V 2
VL Source Current 50 mA 2
VH Sink Current 40 mA 2
Continuous Power Dissipation (16-Pin QSOP) 667 mW TA = +70°C (derate 8.3mW/°C above +70°C) 2
Junction Temperature 150 °C 2
Storage Temperature Range -65 150 °C 2
Lead Temperature 300 °C soldering, 10s 2
Operating Temperature Range -40 85 °C MAX1873_EEE 2

CAD (KiCad official)

  • Symbol: MAX1873SEEE+T
  • Footprint: Package_SO:QSOP-16_3.9x4.9mm_P0.635mm
  • 3D model: QSOP-16-150mil (KiCad packages3D, STEP)
  • 3D model files: max1873seee-t-etched.step / max1873seee-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max1873seee-t.step / max1873seee-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc Maxim Integrated datasheet (14 pp, sha256 09dc8f1e5bd97aad, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF