component
MAX1735EUK50+T
Public Made by Adomby adom
Analog Devices Inc Maxim Integrated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MAX1735EUK50+T
Analog Devices Inc Maxim Integrated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
MAX1735EUK50+T from Analog Devices Inc Maxim Integrated, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the regulator; the datasheet gives no separate limit for this pin. |
| 2 | IN | power_in | Regulator input supply, which can range from -2.5V to -6.5V; bypass with a 1µF capacitor to GND, and this pin also serves as the heatsink, so solder it to a large PC board pad or power plane. |
| 3 | SHDN | input | Shutdown input: drive to GND to turn the regulator off (input current below 1nA), drive above +1.6V or below -1.6V to enable it, and connect to IN for always-on operation. |
| 4 | SET | input | Dual Mode feedback input: connect to GND for the preset output voltage, or use a resistive divider from OUT to SET to set the output between -1.25V and -5.5V, with a regulation setpoint of -1.25V. |
| 5 | OUT | power_out | Regulator output that supplies up to 200mA in regulation and must be bypassed to GND with a 1µF ceramic capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | -6.5 | -2.5 | V | 2 | ||
| Output Voltage Accuracy | -1 | 1 | % | TA = +25°C, IOUT = -100µA | 2 | ||
| Output Voltage Accuracy | -2 | 2 | % | IOUT = -100µA, TA = 0°C to +85°C | 2 | ||
| Output Voltage Accuracy | -3 | 2 | % | ILOAD = -100µA to -200mA | 2 | ||
| SET Regulation Set Point | -1.2625 | -1.25 | -1.2375 | V | Circuit of Figure 3, TA = +25°C, IOUT = -100µA | 2 | |
| SET Regulation Set Point | -1.275 | -1.225 | V | Circuit of Figure 3, IOUT = -100µA, TA = 0°C to +85°C | 2 | ||
| SET Regulation Set Point | -1.275 | -1.2125 | V | Circuit of Figure 3, ILOAD = -100µA to -200mA | 2 | ||
| Maximum Output Current | IOUT | -200 | mA | 2 | |||
| Current Limit | ILIM | -1020 | -515 | -250 | mA | VOUT = 0 | 2 |
| Ground-Pin Current | IQ | -180 | -85 | µA | IOUT = -100µA | 2 | |
| Ground-Pin Current | IQ | -125 | µA | IOUT = -200mA | 2 | ||
| Dropout Voltage | 80 | 240 | mV | IOUT = -200mA | 2 | ||
| Line Regulation | -0.15 | 0 | 0.15 | %/V | Circuit of Figure 3, VIN from -6.5V to -2.5V, VOUT = -1.25V | 2 | |
| Shutdown Supply Current | -1 | -0.001 | µA | VSHDN = 0, TA = +25°C | 2 | ||
| Shutdown Supply Current | -1 | µA | VSHDN = 0, TA = +85°C | 2 | |||
| SHDN Input High Threshold | 1.6 | V | Positive voltage at SHDN | 2 | |||
| SHDN Input High Threshold | -1.6 | V | Negative voltage at SHDN | 2 | |||
| SHDN Input Low Threshold | 0.4 | V | Positive voltage at SHDN | 2 | |||
| SHDN Input Low Threshold | -0.4 | V | Negative voltage at SHDN | 2 | |||
| Set Input Bias Current | ISET | -100 | -15 | nA | VSET = -1.25V, TA = +25°C | 2 | |
| SHDN Input Bias Current | -0.5 | 0.5 | µA | VSHDN = 0, -6.5V; TA = +25°C | 2 | ||
| Power-Supply Rejection Ratio | PSRR | 60 | dB | f = 100Hz | 2 | ||
| Output Voltage Range (adjustable) | VOUT | -5.5 | -1.25 | V | Adjustable mode with external resistive divider from OUT to SET | 1 | |
| Operating Temperature Range | TA | -40 | 85 | °C | 2 | ||
| Input Capacitor | CIN | 1 | µF | Connected between IN and GND | 8 | ||
| Output Capacitor | COUT | 1 | 10 | µF | Output -2.5V to -5.5V (1µF or greater); 10µF maximum for stability | 8 | |
| Output Capacitor ESR | ESR | 0.2 | Ω | Output voltage -2.5V to -5.5V | 8 | ||
| IN, SET to GND | -7 | 0.3 | V | 2 | |||
| SHDN to GND | 7 | V | Minimum is (VIN - 0.3) V | 2 | |||
| OUT to GND | 0.3 | V | Minimum is (VIN - 0.3) V | 2 | |||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Lead Temperature | 300 | °C | Soldering, 10s | 2 | |||
| Continuous Power Dissipation (5-Pin SOT23) | PD | 571 | mW | TA = +70°C; derate 7.1mW/°C above +70°C | 2 | ||
| Thermal Resistance, Junction-to-Ambient (5-Pin SOT23) | θJA | 0.14 | °C/mW | Typical application circuit, approximate | 7 |
CAD (KiCad official)
- Symbol:
MAX1735EUK50+T - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
max1735euk50-t-etched.step/max1735euk50-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max1735euk50-t.step/max1735euk50-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc Maxim Integrated datasheet (10 pp, sha256
0d9c2e50fd588083, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MAX1735EUK50+T
**Analog Devices Inc Maxim Integrated** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
MAX1735EUK50+T from Analog Devices Inc Maxim Integrated, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the regulator; the datasheet gives no separate limit for this pin. |
| 2 | IN | power_in | Regulator input supply, which can range from -2.5V to -6.5V; bypass with a 1µF capacitor to GND, and this pin also serves as the heatsink, so solder it to a large PC board pad or power plane. |
| 3 | SHDN | input | Shutdown input: drive to GND to turn the regulator off (input current below 1nA), drive above +1.6V or below -1.6V to enable it, and connect to IN for always-on operation. |
| 4 | SET | input | Dual Mode feedback input: connect to GND for the preset output voltage, or use a resistive divider from OUT to SET to set the output between -1.25V and -5.5V, with a regulation setpoint of -1.25V. |
| 5 | OUT | power_out | Regulator output that supplies up to 200mA in regulation and must be bypassed to GND with a 1µF ceramic capacitor. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | -6.5 | | -2.5 | V | | 2 |
| Output Voltage Accuracy | | -1 | | 1 | % | TA = +25°C, IOUT = -100µA | 2 |
| Output Voltage Accuracy | | -2 | | 2 | % | IOUT = -100µA, TA = 0°C to +85°C | 2 |
| Output Voltage Accuracy | | -3 | | 2 | % | ILOAD = -100µA to -200mA | 2 |
| SET Regulation Set Point | | -1.2625 | -1.25 | -1.2375 | V | Circuit of Figure 3, TA = +25°C, IOUT = -100µA | 2 |
| SET Regulation Set Point | | -1.275 | | -1.225 | V | Circuit of Figure 3, IOUT = -100µA, TA = 0°C to +85°C | 2 |
| SET Regulation Set Point | | -1.275 | | -1.2125 | V | Circuit of Figure 3, ILOAD = -100µA to -200mA | 2 |
| Maximum Output Current | IOUT | -200 | | | mA | | 2 |
| Current Limit | ILIM | -1020 | -515 | -250 | mA | VOUT = 0 | 2 |
| Ground-Pin Current | IQ | -180 | -85 | | µA | IOUT = -100µA | 2 |
| Ground-Pin Current | IQ | | | -125 | µA | IOUT = -200mA | 2 |
| Dropout Voltage | | | 80 | 240 | mV | IOUT = -200mA | 2 |
| Line Regulation | | -0.15 | 0 | 0.15 | %/V | Circuit of Figure 3, VIN from -6.5V to -2.5V, VOUT = -1.25V | 2 |
| Shutdown Supply Current | | -1 | -0.001 | | µA | VSHDN = 0, TA = +25°C | 2 |
| Shutdown Supply Current | | -1 | | | µA | VSHDN = 0, TA = +85°C | 2 |
| SHDN Input High Threshold | | 1.6 | | | V | Positive voltage at SHDN | 2 |
| SHDN Input High Threshold | | | | -1.6 | V | Negative voltage at SHDN | 2 |
| SHDN Input Low Threshold | | | | 0.4 | V | Positive voltage at SHDN | 2 |
| SHDN Input Low Threshold | | -0.4 | | | V | Negative voltage at SHDN | 2 |
| Set Input Bias Current | ISET | -100 | -15 | | nA | VSET = -1.25V, TA = +25°C | 2 |
| SHDN Input Bias Current | | -0.5 | | 0.5 | µA | VSHDN = 0, -6.5V; TA = +25°C | 2 |
| Power-Supply Rejection Ratio | PSRR | 60 | | | dB | f = 100Hz | 2 |
| Output Voltage Range (adjustable) | VOUT | -5.5 | | -1.25 | V | Adjustable mode with external resistive divider from OUT to SET | 1 |
| Operating Temperature Range | TA | -40 | | 85 | °C | | 2 |
| Input Capacitor | CIN | 1 | | | µF | Connected between IN and GND | 8 |
| Output Capacitor | COUT | 1 | | 10 | µF | Output -2.5V to -5.5V (1µF or greater); 10µF maximum for stability | 8 |
| Output Capacitor ESR | ESR | | | 0.2 | Ω | Output voltage -2.5V to -5.5V | 8 |
| IN, SET to GND | | -7 | | 0.3 | V | | 2 |
| SHDN to GND | | | | 7 | V | Minimum is (VIN - 0.3) V | 2 |
| OUT to GND | | | | 0.3 | V | Minimum is (VIN - 0.3) V | 2 |
| Junction Temperature | TJ | | | 150 | °C | | 2 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 2 |
| Lead Temperature | | | | 300 | °C | Soldering, 10s | 2 |
| Continuous Power Dissipation (5-Pin SOT23) | PD | | | 571 | mW | TA = +70°C; derate 7.1mW/°C above +70°C | 2 |
| Thermal Resistance, Junction-to-Ambient (5-Pin SOT23) | θJA | | 0.14 | | °C/mW | Typical application circuit, approximate | 7 |
## CAD (KiCad official)
- Symbol: `MAX1735EUK50+T`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `max1735euk50-t-etched.step` / `max1735euk50-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `max1735euk50-t.step` / `max1735euk50-t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices Inc Maxim Integrated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589784579797659648) (10 pp, sha256 `0d9c2e50fd588083`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/max1735euk50-t-datasheet.pdf)