component
MAX17320G20+
Public Made by Adomby adom
Analog Devices Inc./Maxim Integrated Battery Management ICs, TQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMAX17320G20+
Analog Devices Inc./Maxim Integrated · Battery Management ICs · TQFN-24(4x4)
MAX17320G20+ from Analog Devices Inc./Maxim Integrated, in a TQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Power supply input; connect to the positive terminal of the cell stack through a 10Ω resistor and bypass to GND with a 0.1µF/25V ceramic capacitor. |
| 2 | CP | power_out | Charge pump output and bypass; bypass CP to IN with a 0.47µF/25V ceramic capacitor. |
| 3 | CHG | output | Charge FET gate control; drives the high-side CHG N-FET gate between CP and IN to enable or disable it, with a 0.1µF capacitor from the charge FET gate to source. |
| 4 | DIS | output | Discharge FET gate control; drives the high-side DIS N-FET gate between CP and PCKP to enable or disable it. |
| 5 | ZVC | passive | Zero-volt charge path; recovery charge current is set by a resistor from the pack positive terminal to ZVC, and ZVC is left open if not used. |
| 6 | PCKP | passive | Connect to the positive terminal of the pack connector through a 1kΩ resistor. |
| 7 | ALRT | output | Programmable alert output. |
| 8 | SCL/OD | input | Serial clock input for I2C communication or speed selection for 1-Wire communication; input only, with an internal pulldown (IPD) for sensing pack disconnection. |
| 9 | SDA/DQ | bidirectional | Serial data input/output for both 1-Wire and I2C modes; open-drain output driver with an internal pulldown (IPD) for sensing pack disconnection. |
| 10 | TH1 | passive | Thermistor input 1; connect a 10k/100k thermistor from TH1 to GND, or leave disconnected or connect to GND if not used. |
| 11 | PFAIL | output | Permanent failure indicator; connects to a three-terminal fuse to act on primary FET failure, and connects to GND through a 1kΩ resistor if not used. |
| 12 | AOLDO | power_out | Always-on LDO, configurable as 3.4V or 1.8V; bypass to GND with a 0.47µF/10V ceramic capacitor, or leave disconnected or connect to GND through a 10kΩ resistor if not used. |
| 13 | REG3 | power_out | Internal 3.4V regulator output; bypass to GND with a 0.47µF/10V ceramic capacitor. |
| 14 | CSN | passive | System ground and current measurement negative sense point; Kelvin connect to the load side of the sense resistor. |
| 15 | CSP | passive | Device ground and current measurement positive sense point; Kelvin connect to the cell side of the sense resistor. |
| 16 | TH2 | passive | Thermistor input 2; connect a 10k/100k thermistor from TH2 to GND, or leave disconnected or connect to GND if not used. |
| 17 | REG2 | power_out | Internal 1.8V regulator output; bypass to GND with a 0.47µF/10V ceramic capacitor. |
| 18 | TH3 | passive | Thermistor input 3; connect a 10k/100k thermistor from TH3 to GND, or leave disconnected or connect to GND if not used. |
| 19 | TH4 | passive | Thermistor input 4; connect a 10k/100k thermistor from TH4 to GND, or leave disconnected or connect to GND if not used. |
| 20 | GND | power_in | Ground pin; connect to ground and do not share the ground trace with the CSP Kelvin-sense trace. |
| 21 | CELL1 | passive | Cell voltage sense 1, used for cell balancing and voltage sensing. |
| 22 | CELL2 | passive | Cell voltage sense 2, used for cell balancing and voltage sensing. |
| 23 | CELL3 | passive | Cell voltage sense 3, used for cell balancing and voltage sensing. |
| 24 | BATTS | passive | Battery voltage sense of the top cell in the series stack, used for cell balancing and voltage sensing. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc./Maxim Integrated |
| Package | TQFN-24(4x4) |
| Category | Power Management ICs |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
MAX17320G20+ - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: TQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files:
max17320g20-etched.step/max17320g20-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max17320g20.step/max17320g20.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc./Maxim Integrated datasheet (180 pp, sha256
6477d1dea9891217, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).