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MAX1510ETB+T

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Analog Devices Inc Maxim Integrated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TDFN-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MAX1510ETB+T

Analog Devices Inc Maxim Integrated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TDFN-10-EP(3x3)

MAX1510ETB+T from Analog Devices Inc Maxim Integrated, in a TDFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REFOUT output Buffered reference output of the unity-gain reference input buffer, which sources and sinks over 5mA; bypass REFOUT to AGND with a 0.33µF or greater ceramic capacitor.
2 VCC power_in Analog supply input connected to the +3.3V system supply (VCC bias supply range 2.7V to 3.6V); bypass VCC to AGND with a 1µF or greater ceramic capacitor.
3 AGND power_in Analog ground; connect the backside exposed pad to AGND.
4 REFIN input External reference input that sets the output regulation voltage (VOUTS = VREFIN), with a REFIN voltage range of 0.5V to 1.5V.
5 PGOOD output Open-drain power-good output that is low when the output is more than 150mV (typ) above or below the regulation point, during soft-start, and in shutdown, and becomes high impedance 2ms after the output reaches regulation at startup.
6 OUTS input Output sense input that sets the regulation level from REFIN; connect to the remote DDR termination bypass capacitors, and it is internally connected to OUT through a 12kΩ resistor.
7 SHDN input Shutdown control input that must be connected to VCC for normal operation and to analog ground to shut down the linear regulator, with logic-high at 2.0V min and logic-low at 0.8V max, while the reference buffer remains active in shutdown.
8 PGND power_in Power ground that is internally connected to the output sink MOSFET.
9 OUT power_out Output of the linear regulator, adjustable from 0.5V to 1.5V, sourcing and sinking up to 3A peak (typ).
10 IN power_in Power input internally connected to the output source MOSFET, operating from 1.1V to 3.6V.
11 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Analog Devices Inc Maxim Integrated
Package TDFN-10-EP(3x3)
Category Power Management (PMIC)
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
IN to PGND voltage -0.3 4.3 V 2
VCC to AGND voltage -0.3 4.3 V 2
PGND to AGND voltage -0.3 0.3 V 2
OUT to PGND voltage -0.3 V Max printed as (VIN + 0.3V) 2
OUTS to AGND voltage -0.3 V Max printed as (VIN + 0.3V) 2
REFIN, REFOUT, SHDN, PGOOD to AGND voltage -0.3 V Max printed as (VCC + 0.3V) 2
OUT continuous RMS current -1.6 1.6 A 100s 2
OUT continuous RMS current -2.5 2.5 A 1s 2
Junction temperature 150 °C 2
Storage temperature range -65 150 °C 2
Lead temperature (soldering, 10s) 300 °C 10s 2
Soldering temperature (reflow), lead(Pb)-free packages 260 °C Lead(Pb)-free packages 2
Soldering temperature (reflow), packages containing lead(Pb) 240 °C Packages containing lead(Pb) 2
Operating temperature range -40 85 °C MAX1510ETB 2
Power dissipation derating 24.4 mW/°C Above TA = +70°C 2
Input-voltage range, power input VIN 1.1 3.6 V Power input 2
Input-voltage range, bias supply VCC 2.7 3.6 V Bias supply 2
Output capacitor COUT COUT 10 220 µF Output stability independent of COUT over this range 11
Output capacitor ESR ESR 2 50 mΩ Needed for stability 11
Input bypass capacitor (IN to PGND) 10 µF Ceramic, 10µF or greater 11
VCC bypass capacitor (VCC to AGND) 1 µF Ceramic, 1µF or greater 9
Quiescent supply current (VCC) ICC 0.7 1.3 mA Load = 0, VREFIN > 0.45V 2
Shutdown supply current (VCC) ICC(SHDN) 350 600 µA SHDN = GND, VREFIN > 0.45V 2
Shutdown supply current (VCC) ICC(SHDN) 50 100 µA SHDN = GND, REFIN = GND 2
Quiescent supply current (VIN) IIN 0.4 10 mA Load = 0 2
Shutdown supply current (VIN) IIN(SHDN) 0.1 10 µA SHDN = GND 2
Feedback-voltage error VOUTS -4 0 4 mV REFIN to OUTS, IOUT = ±200mA, TA = +25°C 2
Load-regulation error -15 15 mV -1A ≤ IOUT ≤ +1A 2
OUTS input-bias current IOUTS -1 1 µA 2
Output adjust range 0.5 1.5 V 2
OUT on-resistance, high-side MOSFET (source) 0.14 0.25 Ω IOUT = 0.1A 2
OUT on-resistance, low-side MOSFET (sink) 0.14 0.25 Ω IOUT = -0.1A 2
REFIN voltage range VREFIN 0.5 1.5 V 3
REFIN input-bias current IREFIN -1 1 µA TA = +25°C 3
REFIN undervoltage-lockout voltage 0.35 0.45 V Rising edge, hysteresis = 50mV 3
REFOUT load regulation ΔVREFOUT -20 20 mV IREFOUT = ±5mA 3
VCC undervoltage-lockout threshold VUVLO 2.45 2.55 2.65 V Rising edge, hysteresis = 100mV 3
IN undervoltage-lockout threshold 0.9 1.1 V Rising edge, hysteresis = 55mV 3
Current-limit threshold ILIMIT 1.8 3 4.2 A TA = -40°C to +85°C 3
Current-limit threshold (second row as printed) ILIMIT 1.5 3 4.2 A TA = -40°C to +85°C 3
PGOOD lower trip threshold -200 -150 -100 mV With respect to feedback threshold, hysteresis = 12mV 3
PGOOD upper trip threshold 100 150 200 mV With respect to feedback threshold, hysteresis = 12mV 3
PGOOD propagation delay tPGOOD 5 10 35 µs OUTS forced 25mV beyond PGOOD trip threshold 3
PGOOD startup delay 1 2 3.5 ms Startup rising edge, OUTS within ±100mV of the feedback threshold 3
SHDN logic input current -1 1 µA SHDN = VCC or GND, TA = +25°C 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper large ground plane with good thermal contact to the back￾side pad, and use wide input and output traces. When 1 square inch of copper is connected to the device, 11

CAD (KiCad official)

  • Symbol: MAX1510ETB+T
  • Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
  • 3D model: TDFN-10-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: max1510etb-t-etched.step / max1510etb-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max1510etb-t.step / max1510etb-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc Maxim Integrated datasheet (13 pp, sha256 36641a13d244ab53, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF