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MAX12930CASA+

Analog Devices Inc./Maxim Integrated · Digital Isolators · SOIC-8

MAX12930CASA+ from Analog Devices Inc./Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDDA power_in Power supply for side A (1.71V to 5.5V), bypass with a 0.1µF ceramic capacitor to GNDA.
2 IN1 input Logic input for channel 1, referenced to GNDA.
3 IN2 input Logic input for channel 2, referenced to GNDA.
4 GNDA power_in Ground reference for side A.
5 GNDB power_in Ground reference for side B.
6 OUT2 output Push-pull logic output of channel 2, referenced to GNDB.
7 OUT1 output Push-pull logic output of channel 1, referenced to GNDB.
8 VDDB power_in Power supply for side B (1.71V to 5.5V), bypass with a 0.1µF ceramic capacitor to GNDB.

Key specifications

Parameter Value
Manufacturer Analog Devices Inc./Maxim Integrated
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDDA VDDA 1.71 5.5 V Relative to GNDA 3
Supply Voltage VDDB VDDB 1.71 5.5 V Relative to GNDB 3
Undervoltage-Lockout Threshold VUVLO_ 1.5 1.6 1.66 V VDD_ rising 3
Undervoltage-Lockout Threshold Hysteresis VUVLO_HYST 45 mV 3
Supply Current Side A (MAX12930) IDDA 0.32 0.58 mA 1MHz square wave, CL = 0pF, VDDA = 5V 3
Supply Current Side A (MAX12930) IDDA 0.31 0.54 mA 1MHz square wave, CL = 0pF, VDDA = 3.3V 3
Supply Current Side A (MAX12930) IDDA 0.81 1.26 mA 12.5MHz square wave, CL = 0pF, VDDA = 5V 3
Supply Current Side A (MAX12930) IDDA 0.8 1.2 mA 12.5MHz square wave, CL = 0pF, VDDA = 3.3V 3
Supply Current Side A (MAX12930) IDDA 2.15 3 mA 50MHz square wave, CL = 0pF, VDDA = 5V 3
Supply Current Side A (MAX12930) IDDA 2.09 2.91 mA 50MHz square wave, CL = 0pF, VDDA = 3.3V 3
Supply Current Side B (MAX12930) IDDB 0.5 0.83 mA 1MHz square wave, CL = 0pF, VDDB = 5V 3
Supply Current Side B (MAX12930) IDDB 0.47 0.79 mA 1MHz square wave, CL = 0pF, VDDB = 3.3V 3
Supply Current Side B (MAX12930) IDDB 1.37 1.83 mA 12.5MHz square wave, CL = 0pF, VDDB = 5V 3
Supply Current Side B (MAX12930) IDDB 1.02 1.4 mA 12.5MHz square wave, CL = 0pF, VDDB = 3.3V 3
Supply Current Side B (MAX12930) IDDB 4.21 4.99 mA 50MHz square wave, CL = 0pF, VDDB = 5V 3
Supply Current Side B (MAX12930) IDDB 2.81 3.39 mA 50MHz square wave, CL = 0pF, VDDB = 3.3V 3
Input High Voltage VIH 0.7 xVDD_ 2.25V ≤ VDD_ ≤ 5.5V 4
Input High Voltage VIH 0.75 xVDD_ 1.71V ≤ VDD_ < 2.25V 4
Input Low Voltage VIL 0.8 V 2.25V ≤ VDD_ ≤ 5.5V 4
Input Low Voltage VIL 0.7 V 1.71V ≤ VDD_ < 2.25V 4
Input Pullup Current IPU -10 -5 -1.5 µA IN_, MAX1293_B/C 4
Output Voltage Low VOL 0.4 V IOUT = 4mA sink 5
Input Hysteresis VHYS 80 mV MAX1293_C/F 4
Input Capacitance CIN 2 pF IN_, fSW = 1MHz 4
Maximum Data Rate DRMAX 150 Mbps MAX1293_C/F 7
Minimum Pulse Width PWMIN 5 ns 2.25V ≤ VDD_ ≤ 5.5V 7
Minimum Pulse Width PWMIN 6.67 ns 1.71V ≤ VDD_ ≤ 1.89V 7
Propagation Delay tPLH tPLH 4.1 5.4 9.2 ns 4.5V ≤ VDD_ ≤ 5.5V 7
Propagation Delay tPLH tPLH 4.2 5.9 10.2 ns 3.0V ≤ VDD_ ≤ 3.6V 7
Propagation Delay tPLH tPLH 4.9 7.1 13.4 ns 2.25V ≤ VDD_ ≤ 2.75V 7
Propagation Delay tPLH tPLH 7.1 10.9 20.3 ns 1.71V ≤ VDD_ ≤ 1.89V 7
Propagation Delay tPHL tPHL 4.3 5.6 9.4 ns 4.5V ≤ VDD_ ≤ 5.5V 7
Propagation Delay tPHL tPHL 4.4 6.2 10.5 ns 3.0V ≤ VDD_ ≤ 3.6V 7
Propagation Delay tPHL tPHL 5.1 7.3 14.1 ns 2.25V ≤ VDD_ ≤ 2.75V 7
Propagation Delay tPHL tPHL 7.2 10.9 21.7 ns 1.71V ≤ VDD_ ≤ 1.89V 7
Pulse Width Distortion PWD 0.3 2 ns 7
Propagation Delay Skew Part-to-Part tSPLH tSPLH 3.7 ns 4.5V ≤ VDD_ ≤ 5.5V 7
Propagation Delay Skew Part-to-Part tSPLH tSPLH 10.3 ns 1.71V ≤ VDD_ ≤ 1.89V 7
Propagation Delay Skew Part-to-Part tSPHL tSPHL 3.8 ns 4.5V ≤ VDD_ ≤ 5.5V 7
Propagation Delay Skew Part-to-Part tSPHL tSPHL 11.5 ns 1.71V ≤ VDD_ ≤ 1.89V 7
Channel-to-Channel Skew Same Direction tSCSLH tSCSLH 2 ns MAX12930 only 7
Channel-to-Channel Skew Same Direction tSCSHL tSCSHL 2 ns MAX12930 only 7
Common-Mode Transient Immunity CMTI 50 kV/µs IN_ = GND_ or VDD_ (Note 4) 7
Peak Eye Diagram Jitter tJIT(PK) 90 ps 150Mbps 7
Clock Jitter RMS tJCLK(RMS) 6.5 ps 500kHz Clock Input Rising/Falling Edges 7
Rise Time tR 2.2 ns 3.0V ≤ VDD_ ≤ 3.6V 8
Fall Time tF 2 ns 3.0V ≤ VDD_ ≤ 3.6V 8
ESD Human Body Model -3 3 kV all pins 8
Supply voltage VDD_ to GND_ VDD -0.3 6 V VDDA to GNDA, VDDB to GNDB 2
IN_ to GND_ IN -0.3 6 V IN_ on Side A to GNDA, Side B to GNDB 2
Operating Temperature Range TA -40 125 °C 2
Maximum Junction Temperature TJ 150 °C 2
Storage Temperature Range TSTG -60 150 °C 2
Soldering Temperature (reflow) 260 °C 2
Junction to Ambient Thermal Resistance θJA 172.8 °C/W 8 Narrow SOIC, four-layer board 2
Junction to Case Thermal Resistance θJC 67.6 °C/W 8 Narrow SOIC, four-layer board 2
Maximum Withstand Isolation Voltage VISO 3000 VRMS fSW = 60Hz, duration = 60s (Note 5, 6) 10

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pet The MAX12930-MAX12931 narrow-body SOIC are certified to DIN VDE V 0884-11: 2017-01 Basic Insulation, Maximum Transient Isolation Voltage 4200VPK, Maximum Repetitive Peak Isolation Voltage 630VPK. 9

CAD (KiCad official)

  • Symbol: MAX12930CASA+
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: max12930casa-etched.step / max12930casa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max12930casa.step / max12930casa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc./Maxim Integrated datasheet (24 pp, sha256 1082a23cefedacbf, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF