component
M95M02-DRMN6TP
Public Made by Adomby adom
STMicroelectronics EEPROM, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# M95M02-DRMN6TP++**STMicroelectronics** · EEPROM · SOP-8++M95M02-DRMN6TP from STMicroelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | ~{S} | input | Active-low chip select; driving low selects the device (Active power mode) and enables communication; driving high deselects the device and forces Q to high impedance. |+| 2 | Q | output | Serial data output; data shifted out MSB first on the falling edge of C; held at high impedance when S is high or during Hold condition. |+| 3 | ~{W} | input | Active-low write protect input; when driven low with SRWD=1 in the Status register, places the device in Hardware Protected mode, freezing the BP1/BP0 bits; must be held stable during all Write instructions. |+| 4 | VSS | power_in | Ground; reference potential for all signals including the VCC supply voltage. |+| 5 | D | input | Serial data input; receives instructions, addresses, and write data MSB first, latched on the rising edge of serial clock C. |+| 6 | C | input | Serial clock input; instructions, addresses, and data on D are latched on the rising edge; Q changes from the falling edge; supports SPI modes CPOL=0/CPHA=0 and CPOL=1/CPHA=1 up to 5 MHz. |+| 7 | ~{HOLD} | input | Active-low hold input; when driven low while S is low and C is already low, pauses serial communication without deselecting the device; Q goes high impedance during the Hold condition. |+| 8 | VCC | power_in | Supply voltage; 1.8 to 5.5 V (M95M02-DR) or 1.7 to 5.5 V (M95M02-DF); must remain stable and valid throughout all operations including the internal write cycle tW (max 10 ms). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOP-8 |+| Category | Memory |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `M95M02-DRMN6TP`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8 (KiCad packages3D, STEP)+- 3D model files: `m95m02-drmn6tp-etched.step` / `m95m02-drmn6tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m95m02-drmn6tp.step` / `m95m02-drmn6tp.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907490582519808) (47 pp, sha256 `e629e6b6552aea55`, retrieved 2026-09-26, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-4-6` (text+vision), consensus `claude-opus-4-7` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/m95m02-drmn6tp-datasheet.pdf)
page.jsonadded+158@@ -0,0 +1,158 @@+{+ "slug": "m95m02-drmn6tp",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics EEPROM, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "memory",+ "m95m02-drmn6tp",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "m95m02-drmn6tp.kicad_sym",+ "m95m02-drmn6tp.kicad_mod",+ "m95m02-drmn6tp.glb",+ "m95m02-drmn6tp.step",+ "m95m02-drmn6tp.lbr",+ "docs/hero.png",+ "docs/m95m02-drmn6tp-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "M95M02-DRMN6TP",+ "manufacturer": "STMicroelectronics",+ "package": "SOP-8",+ "pin_count": 8,+ "category": "Memory",+ "subcategory": "EEPROM",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907490582519808",+ "parts": {+ "symbol": "m95m02-drmn6tp.kicad_sym",+ "footprint": "m95m02-drmn6tp.kicad_mod",+ "model_3d": "m95m02-drmn6tp-etched.glb",+ "model_3d_plain": "m95m02-drmn6tp.glb",+ "model_3d_step": "m95m02-drmn6tp-etched.step",+ "model_3d_step_plain": "m95m02-drmn6tp.step",+ "lbr": "m95m02-drmn6tp.lbr"+ },+ "distributor_links": {+ "lcsc": "C915963",+ "digikey": "497-11405-2-ND",+ "mouser": "511-M95M02-DRMN6TP"+ },+ "distributor_check": {+ "checked_at": "2026-09-26T14:08:58Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-11405-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-M95M02-DRMN6TP",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "~{S}",+ "type": "input",+ "description": "Active-low chip select; driving low selects the device (Active power mode) and enables communication; driving high deselects the device and forces Q to high impedance."+ },+ {+ "number": "2",+ "name": "Q",+ "type": "output",+ "description": "Serial data output; data shifted out MSB first on the falling edge of C; held at high impedance when S is high or during Hold condition."+ },+ {+ "number": "3",+ "name": "~{W}",+ "type": "input",+ "description": "Active-low write protect input; when driven low with SRWD=1 in the Status register, places the device in Hardware Protected mode, freezing the BP1/BP0 bits; must be held stable during all Write instructions."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground; reference potential for all signals including the VCC supply voltage."+ },+ {+ "number": "5",+ "name": "D",+ "type": "input",+ "description": "Serial data input; receives instructions, addresses, and write data MSB first, latched on the rising edge of serial clock C."+ },+ {+ "number": "6",+ "name": "C",+ "type": "input",+ "description": "Serial clock input; instructions, addresses, and data on D are latched on the rising edge; Q changes from the falling edge; supports SPI modes CPOL=0/CPHA=0 and CPOL=1/CPHA=1 up to 5 MHz."+ },+ {+ "number": "7",+ "name": "~{HOLD}",+ "type": "input",+ "description": "Active-low hold input; when driven low while S is low and C is already low, pauses serial communication without deselecting the device; Q goes high impedance during the Hold condition."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage; 1.8 to 5.5 V (M95M02-DR) or 1.7 to 5.5 V (M95M02-DF); must remain stable and valid throughout all operations including the internal write cycle tW (max 10 ms)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-sonnet-4-6",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-4-7",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 47,+ "cost_usd": 0.5891,+ "at": "2026-09-26T14:08:41"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907490582519808",+ "pages": 47,+ "sha256": "e629e6b6552aea55",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}