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Contents

README

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M95M02-DRMN6TP

STMicroelectronics · EEPROM · SOP-8

M95M02-DRMN6TP from STMicroelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ~{S} input Active-low chip select; driving low selects the device (Active power mode) and enables communication; driving high deselects the device and forces Q to high impedance.
2 Q output Serial data output; data shifted out MSB first on the falling edge of C; held at high impedance when S is high or during Hold condition.
3 ~{W} input Active-low write protect input; when driven low with SRWD=1 in the Status register, places the device in Hardware Protected mode, freezing the BP1/BP0 bits; must be held stable during all Write instructions.
4 VSS power_in Ground; reference potential for all signals including the VCC supply voltage.
5 D input Serial data input; receives instructions, addresses, and write data MSB first, latched on the rising edge of serial clock C.
6 C input Serial clock input; instructions, addresses, and data on D are latched on the rising edge; Q changes from the falling edge; supports SPI modes CPOL=0/CPHA=0 and CPOL=1/CPHA=1 up to 5 MHz.
7 ~{HOLD} input Active-low hold input; when driven low while S is low and C is already low, pauses serial communication without deselecting the device; Q goes high impedance during the Hold condition.
8 VCC power_in Supply voltage; 1.8 to 5.5 V (M95M02-DR) or 1.7 to 5.5 V (M95M02-DF); must remain stable and valid throughout all operations including the internal write cycle tW (max 10 ms).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOP-8
Category Memory
Pins 8

CAD (KiCad official)

  • Symbol: M95M02-DRMN6TP
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: m95m02-drmn6tp-etched.step / m95m02-drmn6tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); m95m02-drmn6tp.step / m95m02-drmn6tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (47 pp, sha256 e629e6b6552aea55, retrieved 2026-09-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-4-6 (text+vision), consensus claude-opus-4-7 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF