component
M95M01-DWMN3TP
Public Made by Adomby adom
STMicroelectronics EEPROM, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownM95M01-DWMN3TP
STMicroelectronics · EEPROM · SOP-8
M95M01-DWMN3TP from STMicroelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | /S | input | Active-low Chip Select; driving low selects the device to start SPI communication; driving high deselects the device and forces Q to high impedance; edge-sensitive after power-up (falling edge must be detected before first operation). |
| 2 | Q | tri_state | Serial data output; shifts data out MSB-first on the falling edge of C during Read operations; enters high impedance when S is high or during Hold mode; VOL ≤ 0.4 V at IOL = 2 mA, VOH ≥ 0.8 VCC at IOH = −2 mA, output capacitance max 8 pF. |
| 3 | /W | input | Active-low Write Protect input; when driven low with SRWD bit = 1, writing the Status Register (WRSR) is blocked and BP1, BP0 bits are frozen; must be driven high or low (not floated). |
| 4 | VSS | power_in | Ground reference (0 V) for all signals including VCC; return current path for supply and all I/O signals. |
| 5 | D | input | Serial data input; receives instruction bytes, 24-bit addresses, and write data MSB-first, latched on the rising edge of C; VIH ≥ 0.7 VCC, VIL ≤ 0.3 VCC, input capacitance max 6 pF. |
| 6 | C | input | Serial clock input; synchronizes the SPI interface (CPOL=0/CPHA=0 or CPOL=1/CPHA=1); data on D latched on rising edge, Q changes after falling edge; fC max 10 MHz at VCC ≥ 2.5 V or 16 MHz at VCC ≥ 4.5 V (TA ≤ 85 °C). |
| 7 | /HOLD | input | Active-low Hold input; asserting low while C is low pauses serial communication without deselecting the device; Q enters high impedance during Hold and D/C inputs are ignored; deselecting while in Hold mode resets the paused communication. |
| 8 | VCC | power_in | Supply voltage, 2.5 V to 5.5 V; must be stable before issuing any instruction; decouple with 10 nF to 100 nF capacitor close to VCC/VSS pins; ICC read max 4 mA at 5.5 V, standby ICC1 max 40 µA at 145 °C/5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
M95M01-DWMN3TP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
m95m01-dwmn3tp-etched.step/m95m01-dwmn3tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m95m01-dwmn3tp.step/m95m01-dwmn3tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (40 pp, sha256
9497f4a9c0dcdee7, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-sonnet-4-6(text+vision), consensusclaude-opus-4-7(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).