component
M95640-DRMN3TP
Public Made by Adomby adom
STMicroelectronics EEPROM, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownM95640-DRMN3TP
STMicroelectronics · EEPROM · SO-8
M95640-DRMN3TP from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip Select input; driving S low selects the device to start communication, driving it high deselects the device and puts Serial Data output (Q) into high impedance. |
| 2 | Q | output | Serial Data output used to shift data out of the device during a Read operation, MSB first, on the falling edge of Serial Clock (C); high impedance when not actively driving output. |
| 3 | W | input | Write Protect input used, in conjunction with the SRWD status-register bit, to write-protect the Status Register. |
| 4 | VSS | power_in | Ground pin; reference for all signals including the VCC supply voltage. |
| 5 | D | input | Serial Data input used to transfer instructions, addresses and write data into the device, latched MSB first on the rising edge of Serial Clock (C). |
| 6 | C | input | Serial Clock input that synchronizes the SPI interface; input data on D is latched on its rising edge and output data on Q changes after its falling edge, up to 20 MHz for VCC ≥ 4.5 V. |
| 7 | HOLD | input | Hold input used to pause serial communication without deselecting the device; when driven low with C low, Q goes high impedance and D/C are ignored until HOLD is driven high again. |
| 8 | VCC | power_in | Supply voltage pin; for this R/3 grade device VCC must be kept within 1.7 V to 5.5 V over the -40 °C to 125 °C operating range, decoupled close to the VCC/VSS pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
M95640-DRMN3TP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
m95640-drmn3tp-etched.step/m95640-drmn3tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m95640-drmn3tp.step/m95640-drmn3tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (44 pp, sha256
61948cd2b79f9222, retrieved 2026-09-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).