component
M95640-DRDW3TP
Public Made by Adomby adom
STMicroelectronics EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# M95640-DRDW3TP++**STMicroelectronics** · EEPROM · TSSOP-8++M95640-DRDW3TP from STMicroelectronics, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | S | input | Chip Select: driving S low selects the device and driving it high deselects it and puts Q in high impedance; after power-up the device is not selected until a falling edge is detected on S. |+| 2 | Q | tri_state | Serial data output: data is shifted out on the falling edge of C, MSB first, and Q is high impedance at all other times; Q voltage is limited to -0.50 V to VCC+0.6 V and DC output current to 5 mA (IOL and IOH). |+| 3 | W | input | Write Protect: used together with the SRWD bit to write-protect the Status Register, and must be driven high or low as appropriate; if SRWD is 1 and W is low, the Status Register cannot be written. |+| 4 | VSS | power_in | Ground: the reference for all signals, including the VCC supply voltage. |+| 5 | D | input | Serial data input: receives instructions, addresses and data to be written, latched on the rising edge of C, MSB first; input voltage range is -0.50 V to 6.5 V. |+| 6 | C | input | Serial clock: synchronizes the serial interface, with D latched on its rising edge and Q changing after its falling edge; maximum clock frequency is 20 MHz for VCC of 4.5 V or higher. |+| 7 | HOLD | input | Hold: pauses serial communication without deselecting the device; Hold mode starts when HOLD is driven low while C is low and ends when HOLD is driven high and C is or becomes low. |+| 8 | VCC | power_in | Supply voltage: for voltage range R the operating range is 1.7 V to 5.5 V, and a decoupling capacitor of about 10 nF to 100 nF should be placed close to the VCC/VSS pins. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | TSSOP-8 |+| Category | Memory |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `M95640-DRDW3TP`+- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`+- 3D model: TSSOP-8 (KiCad packages3D, STEP)+- 3D model files: `m95640-drdw3tp-etched.step` / `m95640-drdw3tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m95640-drdw3tp.step` / `m95640-drdw3tp.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942419668971520) (44 pp, sha256 `61948cd2b79f9222`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/m95640-drdw3tp-datasheet.pdf)
page.jsonadded+198@@ -0,0 +1,198 @@+{+ "slug": "m95640-drdw3tp",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "memory",+ "m95640-drdw3tp",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "m95640-drdw3tp.kicad_sym",+ "m95640-drdw3tp.kicad_mod",+ "m95640-drdw3tp.glb",+ "m95640-drdw3tp.step",+ "m95640-drdw3tp.lbr",+ "docs/hero.png",+ "docs/m95640-drdw3tp-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "m95640-drdw3tp-hero.glb",+ "m95640-drdw3tp-hero.overlay.json"+ ],+ "component": {+ "mpn": "M95640-DRDW3TP",+ "manufacturer": "STMicroelectronics",+ "package": "TSSOP-8",+ "pin_count": 8,+ "category": "Memory",+ "subcategory": "EEPROM",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942419668971520",+ "parts": {+ "symbol": "m95640-drdw3tp.kicad_sym",+ "footprint": "m95640-drdw3tp.kicad_mod",+ "model_3d": "m95640-drdw3tp-hero.glb",+ "model_3d_plain": "m95640-drdw3tp.glb",+ "model_3d_step": "m95640-drdw3tp-etched.step",+ "model_3d_step_plain": "m95640-drdw3tp.step",+ "lbr": "m95640-drdw3tp.lbr"+ },+ "distributor_links": {+ "lcsc": "C2061656"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T01:33:31Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": null,+ "status": "no match"+ },+ "mouser": {+ "pn": null,+ "status": "no match"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "S",+ "type": "input",+ "description": "Chip Select: driving S low selects the device and driving it high deselects it and puts Q in high impedance; after power-up the device is not selected until a falling edge is detected on S."+ },+ {+ "number": "2",+ "name": "Q",+ "type": "tri_state",+ "description": "Serial data output: data is shifted out on the falling edge of C, MSB first, and Q is high impedance at all other times; Q voltage is limited to -0.50 V to VCC+0.6 V and DC output current to 5 mA (IOL and IOH)."+ },+ {+ "number": "3",+ "name": "W",+ "type": "input",+ "description": "Write Protect: used together with the SRWD bit to write-protect the Status Register, and must be driven high or low as appropriate; if SRWD is 1 and W is low, the Status Register cannot be written."+ },+ {+ "number": "4",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground: the reference for all signals, including the VCC supply voltage."+ },+ {+ "number": "5",+ "name": "D",+ "type": "input",+ "description": "Serial data input: receives instructions, addresses and data to be written, latched on the rising edge of C, MSB first; input voltage range is -0.50 V to 6.5 V."+ },+ {+ "number": "6",+ "name": "C",+ "type": "input",+ "description": "Serial clock: synchronizes the serial interface, with D latched on its rising edge and Q changing after its falling edge; maximum clock frequency is 20 MHz for VCC of 4.5 V or higher."+ },+ {+ "number": "7",+ "name": "HOLD",+ "type": "input",+ "description": "Hold: pauses serial communication without deselecting the device; Hold mode starts when HOLD is driven low while C is low and ends when HOLD is driven high and C is or becomes low."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage: for voltage range R the operating range is 1.7 V to 5.5 V, and a decoupling capacitor of about 10 nF to 100 nF should be placed close to the VCC/VSS pins."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The pin numbers are not stated in readable text in the extracted datasheet; Figure 2 (8-pin package ; The MPN M95640-DRDW3TP is not listed by name. The datasheet covers M95640-A125 and M95640-A145. The ; The datasheet's TSSOP8 mechanical outline (page 38) gives the package as 3 x 4.4 mm with 0.65 mm pit",+ "2/8 pins cited to the wrong page (name found elsewhere): ['7:HOLD@p11', '8:VCC@p26']"+ ],+ "pages_sent": 44,+ "cost_usd": 0.3455,+ "at": "2026-10-08T01:33:16"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942419668971520",+ "pages": 44,+ "sha256": "61948cd2b79f9222",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "m95640-drdw3tp.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "cf28a51742b2e31065e201d1b313207140cbfb49062efd938788f7a310d02738",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "m95640-drdw3tp-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "5f93087ef077c967d2cf14ec720956ac19f965406f351cf2e4052fc96753c154",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}