component
M95512-DFMN6TP
Public Made by Adomby adom
STMicroelectronics EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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M95512-DFMN6TP
STMicroelectronics · EEPROM · SOIC-8
M95512-DFMN6TP from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip select; driving it high deselects the device and puts Q in high impedance (Standby Power mode unless a Write cycle is in progress), and driving it low selects the device (Active Power mode). |
| 2 | Q | output | Serial data output; data is shifted out on the falling edge of Serial clock (C) and Q is high impedance when the device is deselected or in the Hold condition. |
| 3 | W | input | Write protect; freezes the size of the memory area protected by the BP1 and BP0 bits, must be driven high or low and be stable during all Write instructions. |
| 4 | VSS | power_in | Ground; the reference for all signals, including the VCC supply voltage. |
| 5 | D | input | Serial data input; receives instructions, addresses and data to be written, latched on the rising edge of Serial clock (C). |
| 6 | C | input | Serial clock; provides the timing of the serial interface, with inputs latched on the rising edge and output data changing from the falling edge, up to 16 MHz. |
| 7 | HOLD | input | Hold; pauses serial communication without deselecting the device, during which Q is high impedance and D and C are Don't Care. |
| 8 | VCC | power_in | Supply voltage; 1.7 V to 5.5 V for M95512-DF, to be held stable and valid during operation and decoupled with 10 to 100 nF close to the VCC/VSS pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
M95512-DFMN6TP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
m95512-dfmn6tp-etched.step/m95512-dfmn6tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m95512-dfmn6tp.step/m95512-dfmn6tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (54 pp, sha256
46546a73b781e404, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# M95512-DFMN6TP
**STMicroelectronics** · EEPROM · SOIC-8
M95512-DFMN6TP from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip select; driving it high deselects the device and puts Q in high impedance (Standby Power mode unless a Write cycle is in progress), and driving it low selects the device (Active Power mode). |
| 2 | Q | output | Serial data output; data is shifted out on the falling edge of Serial clock (C) and Q is high impedance when the device is deselected or in the Hold condition. |
| 3 | W | input | Write protect; freezes the size of the memory area protected by the BP1 and BP0 bits, must be driven high or low and be stable during all Write instructions. |
| 4 | VSS | power_in | Ground; the reference for all signals, including the VCC supply voltage. |
| 5 | D | input | Serial data input; receives instructions, addresses and data to be written, latched on the rising edge of Serial clock (C). |
| 6 | C | input | Serial clock; provides the timing of the serial interface, with inputs latched on the rising edge and output data changing from the falling edge, up to 16 MHz. |
| 7 | HOLD | input | Hold; pauses serial communication without deselecting the device, during which Q is high impedance and D and C are Don't Care. |
| 8 | VCC | power_in | Supply voltage; 1.7 V to 5.5 V for M95512-DF, to be held stable and valid during operation and decoupled with 10 to 100 nF close to the VCC/VSS pins. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `M95512-DFMN6TP`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `m95512-dfmn6tp-etched.step` / `m95512-dfmn6tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m95512-dfmn6tp.step` / `m95512-dfmn6tp.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589828441974874112) (54 pp, sha256 `46546a73b781e404`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/m95512-dfmn6tp-datasheet.pdf)