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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	1d ago
viewers	m95320-drmn8tp: viewers · Ray	1d ago
m95320-drmn8tp-etched.glb	m95320-drmn8tp: factory component page (tier=lcsc) · Ray	1d ago
m95320-drmn8tp-etched.step	m95320-drmn8tp: factory component page (tier=lcsc) · Ray	1d ago
m95320-drmn8tp-hero.glb	m95320-drmn8tp: hero GLB from the etched model (keeps the MPN mark) · Ray	22h ago
m95320-drmn8tp-hero.overlay.json	Publish 0.1.0 · Ray	1d ago
m95320-drmn8tp.glb	Publish 0.1.0 · Ray	1d ago
m95320-drmn8tp.kicad_mod	Publish 0.1.0 · Ray	1d ago
m95320-drmn8tp.kicad_sym	Publish 0.1.0 · Ray	1d ago
m95320-drmn8tp.lbr	Publish 0.1.0 · Ray	1d ago
m95320-drmn8tp.step	Publish 0.1.0 · Ray	1d ago
package.json	Publish 0.1.0 · Ray	1d ago
page.json	Set visibility: public · Ray	1d ago
README.md	Initial commit: component/m95320-drmn8tp · Ray	1d ago

M95320-DRMN8TP

STMicroelectronics · EEPROM · SOP-8

M95320-DRMN8TP from STMicroelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	S	input	Chip Select, active low: driving it low selects the device and starting communication, driving it high deselects the device and puts Q in high impedance; it should follow VCC at power-up via a pull-up.
2	Q	output	Serial Data output: data is shifted out on the falling edge of Serial Clock (C), MSB first, during Read operations and is high impedance otherwise.
3	W	input	Write Protect: used to write-protect the Status Register (with SRWD bit); must be driven high or low as appropriate.
4	VSS	power_in	Ground, the reference for all signals including the VCC supply voltage.
5	D	input	Serial Data input: receives instructions, addresses and data to be written, latched on the rising edge of Serial Clock (C), MSB first.
6	C	input	Serial Clock: synchronizes the serial interface, with inputs latched on the rising edge and Q changing after the falling edge; up to 20 MHz for VCC ≥ 4.5 V, 10 MHz for VCC ≥ 2.5 V, 5 MHz for VCC ≥ 1.7 V.
7	HOLD	input	Hold: pauses serial communication without deselecting the device or resetting the clocking sequence, starting when driven low while C is low; must be driven high or low as appropriate.
8	VCC	power_in	Supply voltage from 1.7 V to 5.5 V, to be decoupled with about 10 nF to 100 nF close to the VCC/VSS pins.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	SOP-8
Category	Memory
Pins	8

CAD (KiCad official)

Symbol: M95320-DRMN8TP
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: m95320-drmn8tp-etched.step / m95320-drmn8tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); m95320-drmn8tp.step / m95320-drmn8tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (42 pp, sha256 6355df0339c2350e, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF