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Initial commit: component/m95320-drmn8tp

Ray ·98814ec791 ·1d ago
2 files changed +242
README.mdadded+44
@@ -0,0 +1,44 @@+# M95320-DRMN8TP++**STMicroelectronics** · EEPROM · SOP-8++M95320-DRMN8TP from STMicroelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | S | input | Chip Select, active low: driving it low selects the device and starting communication, driving it high deselects the device and puts Q in high impedance; it should follow VCC at power-up via a pull-up. |+| 2 | Q | output | Serial Data output: data is shifted out on the falling edge of Serial Clock (C), MSB first, during Read operations and is high impedance otherwise. |+| 3 | W | input | Write Protect: used to write-protect the Status Register (with SRWD bit); must be driven high or low as appropriate. |+| 4 | VSS | power_in | Ground, the reference for all signals including the VCC supply voltage. |+| 5 | D | input | Serial Data input: receives instructions, addresses and data to be written, latched on the rising edge of Serial Clock (C), MSB first. |+| 6 | C | input | Serial Clock: synchronizes the serial interface, with inputs latched on the rising edge and Q changing after the falling edge; up to 20 MHz for VCC ≥ 4.5 V, 10 MHz for VCC ≥ 2.5 V, 5 MHz for VCC ≥ 1.7 V. |+| 7 | HOLD | input | Hold: pauses serial communication without deselecting the device or resetting the clocking sequence, starting when driven low while C is low; must be driven high or low as appropriate. |+| 8 | VCC | power_in | Supply voltage from 1.7 V to 5.5 V, to be decoupled with about 10 nF to 100 nF close to the VCC/VSS pins. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOP-8 |+| Category | Memory |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `M95320-DRMN8TP`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8 (KiCad packages3D, STEP)+- 3D model files: `m95320-drmn8tp-etched.step` / `m95320-drmn8tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m95320-drmn8tp.step` / `m95320-drmn8tp.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589948596528447488) (42 pp, sha256 `6355df0339c2350e`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/m95320-drmn8tp-datasheet.pdf)
page.jsonadded+198
@@ -0,0 +1,198 @@+{+  "slug": "m95320-drmn8tp",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics EEPROM, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "memory",+    "m95320-drmn8tp",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "m95320-drmn8tp.kicad_sym",+    "m95320-drmn8tp.kicad_mod",+    "m95320-drmn8tp.glb",+    "m95320-drmn8tp.step",+    "m95320-drmn8tp.lbr",+    "docs/hero.png",+    "docs/m95320-drmn8tp-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "m95320-drmn8tp-hero.glb",+    "m95320-drmn8tp-hero.overlay.json"+  ],+  "component": {+    "mpn": "M95320-DRMN8TP",+    "manufacturer": "STMicroelectronics",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "Memory",+    "subcategory": "EEPROM",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589948596528447488",+    "parts": {+      "symbol": "m95320-drmn8tp.kicad_sym",+      "footprint": "m95320-drmn8tp.kicad_mod",+      "model_3d": "m95320-drmn8tp-hero.glb",+      "model_3d_plain": "m95320-drmn8tp.glb",+      "model_3d_step": "m95320-drmn8tp-etched.step",+      "model_3d_step_plain": "m95320-drmn8tp.step",+      "lbr": "m95320-drmn8tp.lbr"+    },+    "distributor_links": {+      "lcsc": "C1852772"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T14:49:48Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": null,+        "status": "no match"+      },+      "mouser": {+        "pn": null,+        "status": "no match"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "S",+        "type": "input",+        "description": "Chip Select, active low: driving it low selects the device and starting communication, driving it high deselects the device and puts Q in high impedance; it should follow VCC at power-up via a pull-up."+      },+      {+        "number": "2",+        "name": "Q",+        "type": "output",+        "description": "Serial Data output: data is shifted out on the falling edge of Serial Clock (C), MSB first, during Read operations and is high impedance otherwise."+      },+      {+        "number": "3",+        "name": "W",+        "type": "input",+        "description": "Write Protect: used to write-protect the Status Register (with SRWD bit); must be driven high or low as appropriate."+      },+      {+        "number": "4",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground, the reference for all signals including the VCC supply voltage."+      },+      {+        "number": "5",+        "name": "D",+        "type": "input",+        "description": "Serial Data input: receives instructions, addresses and data to be written, latched on the rising edge of Serial Clock (C), MSB first."+      },+      {+        "number": "6",+        "name": "C",+        "type": "input",+        "description": "Serial Clock: synchronizes the serial interface, with inputs latched on the rising edge and Q changing after the falling edge; up to 20 MHz for VCC ≥ 4.5 V, 10 MHz for VCC ≥ 2.5 V, 5 MHz for VCC ≥ 1.7 V."+      },+      {+        "number": "7",+        "name": "HOLD",+        "type": "input",+        "description": "Hold: pauses serial communication without deselecting the device or resetting the clocking sequence, starting when driven low while C is low; must be driven high or low as appropriate."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage from 1.7 V to 5.5 V, to be decoupled with about 10 nF to 100 nF close to the VCC/VSS pins."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-sonnet-5-5",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Datasheet covers the M95320-DRE family. The MN ordering code means SO8 (150 mil) package, and the pi",+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 42,+        "cost_usd": 0.2527,+        "at": "2026-10-08T14:49:31"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589948596528447488",+        "pages": 42,+        "sha256": "6355df0339c2350e",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "m95320-drmn8tp.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "m95320-drmn8tp-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "31f75ba430fec520baf6f193dfac3c8d4e074eaa9e3925296ffae66b9196139d",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file