component
M95256-WMN6P
Public Made by Adomby adom
STMicroelectronics EEPROM, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownM95256-WMN6P
STMicroelectronics · EEPROM · SO-8
M95256-WMN6P from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip Select, active low: high deselects the device and puts Q in high impedance (Standby unless a Write cycle is in progress), low selects it (Active Power mode); a falling edge is required after power-up before any instruction. |
| 2 | Q | tri_state | Serial Data Output, shifts data out on the falling edge of Serial Clock (C) and is high impedance when deselected or during the Hold condition. |
| 3 | W | input | Write Protect, active low: freezes the size of the memory area protected by the BP1 and BP0 bits of the Status Register, must be driven high or low and stable during all Write instructions. |
| 4 | VSS | power_in | Ground, the reference for all signals including the VCC supply voltage. |
| 5 | D | input | Serial Data Input, receives instructions, addresses and data to be written, latched on the rising edge of Serial Clock (C). |
| 6 | C | input | Serial Clock, provides the timing of the serial interface; inputs are latched on the rising edge and Q changes from the falling edge, with a maximum frequency of 20 MHz. |
| 7 | HOLD | input | Hold, active low: pauses serial communication without deselecting the device; during Hold Q is high impedance and D and C are Don't Care. |
| 8 | VCC | power_in | Supply voltage, 2.5 V to 5.5 V for M95256-W, which must be stable and valid during operation and write cycles; decouple with 10 nF to 100 nF close to the VCC/VSS pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
M95256-WMN6P - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
m95256-wmn6p-etched.step/m95256-wmn6p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m95256-wmn6p.step/m95256-wmn6p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (57 pp, sha256
698166e3207620a0, retrieved 2026-09-29, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).