component
M95256-DRMN3TP
Public Made by Adomby adom
STMicroelectronics EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownM95256-DRMN3TP
STMicroelectronics · EEPROM · SOIC-8
M95256-DRMN3TP from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S# | input | Active-low Chip Select. Driving S# low selects the device and starts SPI communication; driving it high deselects the device and forces the Q output into high impedance. |
| 2 | Q | output | Serial Data Output (MISO). Data is shifted out MSB-first on the falling edge of Serial Clock (C); high-impedance when the device is not selected. |
| 3 | W# | input | Active-low Write Protect. Used together with the BP bits in the Status Register to write-protect the Status Register (hardware protection). |
| 4 | VSS | power_in | Ground reference for all signals including VCC supply. |
| 5 | D | input | Serial Data Input (MOSI). Receives instructions, addresses and data, latched MSB-first on the rising edge of Serial Clock (C). |
| 6 | C | input | Serial Clock. Synchronizes the SPI interface; input data is latched on rising edges and output data changes on falling edges. Supports up to 20 MHz at VCC >= 4.5 V. |
| 7 | HOLD# | input | Active-low Hold. Pauses serial communication without deselecting the device; when low, Q goes high-impedance and D and C are ignored. |
| 8 | VCC | power_in | Supply voltage. Operating range 1.7 to 5.5 V for the R-grade device (M95256-DR). Decouple with a local bypass capacitor to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
M95256-DRMN3TPM95256-DRMN3TPDWM95256-DRMN3TPMF
CAD (KiCad official)
- Symbol:
M95256-DRMN3TP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
m95256-drmn3tp-etched.step/m95256-drmn3tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m95256-drmn3tp.step/m95256-drmn3tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (44 pp, sha256
e20b21cd76326289, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).