component
M95128-WMN6P
Public Made by Adomby adom
STMicroelectronics EEPROM, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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M95128-WMN6P
STMicroelectronics · EEPROM · SO-8
M95128-WMN6P from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S# | input | Chip Select (active low). When high, device is deselected and Q is high impedance; driving low selects the device and places it in Active power mode. A falling edge is required after power-up before any instruction. |
| 2 | Q | output | Serial data output (MISO). Data is shifted out on the falling edge of Serial clock (C). Enters high-impedance when chip is deselected or in Hold condition. |
| 3 | W# | input | Write Protect (active low). Freezes the memory area protected against Write instructions (as configured by BP1/BP0 in the Status register). Must be stable during all Write instructions. |
| 4 | VSS | power_in | Ground reference for all signals, including VCC supply voltage. |
| 5 | D | input | Serial data input (MOSI). Receives instructions, addresses and data bytes MSB first. Values are latched on the rising edge of Serial clock (C). |
| 6 | C | input | Serial clock (SCK). Provides timing for the SPI interface up to 20 MHz. Data on D is latched on the rising edge; data on Q changes on the falling edge. |
| 7 | HOLD# | input | Hold (active low). Pauses serial communications with the device without deselecting it. During Hold, Q is high impedance and D and C are don't care. Chip must be selected (S# low) to enter Hold. |
| 8 | VCC | power_in | Supply voltage. For M95128-W: 2.5 V to 5.5 V. Should be decoupled to VSS with a 10-100 nF capacitor placed close to the device pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
M95128-WMN6PM95128-WMN6TPM95128-WMN6PRMN6PM95128-WMN6PRMN6TPM95128-WMN6PDFMN6PM95128-WMN6PDFMN6TPM95128-WMN6PWDW6TPM95128-WMN6PRDW6TPM95128-WMN6PDFDW6TPM95128-WMN6PWMC6TPM95128-WMN6PRMC6TPM95128-WMN6PDFMC6TPM95128-WMN6PWCS6PM95128-WMN6PRCS6PM95128-WMN6PDFCS6P
CAD (KiCad official)
- Symbol:
M95128-WMN6P - Footprint:
Package_SO:TI_SO-PowerPAD-8 - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
m95128-wmn6p-etched.step/m95128-wmn6p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m95128-wmn6p.step/m95128-wmn6p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (48 pp, sha256
b42ce2bd4117758a, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# M95128-WMN6P
**STMicroelectronics** · EEPROM · SO-8
M95128-WMN6P from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S# | input | Chip Select (active low). When high, device is deselected and Q is high impedance; driving low selects the device and places it in Active power mode. A falling edge is required after power-up before any instruction. |
| 2 | Q | output | Serial data output (MISO). Data is shifted out on the falling edge of Serial clock (C). Enters high-impedance when chip is deselected or in Hold condition. |
| 3 | W# | input | Write Protect (active low). Freezes the memory area protected against Write instructions (as configured by BP1/BP0 in the Status register). Must be stable during all Write instructions. |
| 4 | VSS | power_in | Ground reference for all signals, including VCC supply voltage. |
| 5 | D | input | Serial data input (MOSI). Receives instructions, addresses and data bytes MSB first. Values are latched on the rising edge of Serial clock (C). |
| 6 | C | input | Serial clock (SCK). Provides timing for the SPI interface up to 20 MHz. Data on D is latched on the rising edge; data on Q changes on the falling edge. |
| 7 | HOLD# | input | Hold (active low). Pauses serial communications with the device without deselecting it. During Hold, Q is high impedance and D and C are don't care. Chip must be selected (S# low) to enter Hold. |
| 8 | VCC | power_in | Supply voltage. For M95128-W: 2.5 V to 5.5 V. Should be decoupled to VSS with a 10-100 nF capacitor placed close to the device pins. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Memory |
| Pins | 8 |
## Ordering variants
Same part, different packaging or reel option.
- `M95128-WMN6P`
- `M95128-WMN6TP`
- `M95128-WMN6PRMN6P`
- `M95128-WMN6PRMN6TP`
- `M95128-WMN6PDFMN6P`
- `M95128-WMN6PDFMN6TP`
- `M95128-WMN6PWDW6TP`
- `M95128-WMN6PRDW6TP`
- `M95128-WMN6PDFDW6TP`
- `M95128-WMN6PWMC6TP`
- `M95128-WMN6PRMC6TP`
- `M95128-WMN6PDFMC6TP`
- `M95128-WMN6PWCS6P`
- `M95128-WMN6PRCS6P`
- `M95128-WMN6PDFCS6P`
## CAD (KiCad official)
- Symbol: `M95128-WMN6P`
- Footprint: `Package_SO:TI_SO-PowerPAD-8`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `m95128-wmn6p-etched.step` / `m95128-wmn6p-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m95128-wmn6p.step` / `m95128-wmn6p.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](docs/m95128-wmn6p-datasheet.pdf) (48 pp, sha256 `b42ce2bd4117758a`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/m95128-wmn6p-datasheet.pdf)