main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 14h ago
viewers m95040-drmn8tp: viewers · Ray 14h ago
m95040-drmn8tp-etched.glb m95040-drmn8tp: factory component page (tier=lcsc) · Ray 14h ago
m95040-drmn8tp-etched.step m95040-drmn8tp: factory component page (tier=lcsc) · Ray 14h ago
m95040-drmn8tp-hero.glb Publish 0.1.0 · Ray 14h ago
m95040-drmn8tp-hero.overlay.json Publish 0.1.0 · Ray 14h ago
m95040-drmn8tp.glb Publish 0.1.0 · Ray 14h ago
m95040-drmn8tp.kicad_mod Publish 0.1.0 · Ray 14h ago
m95040-drmn8tp.kicad_sym Publish 0.1.0 · Ray 14h ago
m95040-drmn8tp.lbr Publish 0.1.0 · Ray 14h ago
m95040-drmn8tp.step Publish 0.1.0 · Ray 14h ago
package.json Publish 0.1.0 · Ray 14h ago
page.json Set visibility: public · Ray 14h ago
README.md Initial commit: component/m95040-drmn8tp · Ray 14h ago

M95040-DRMN8TP

STMicroelectronics · EEPROM · SO-8

M95040-DRMN8TP from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S input Chip Select (active low) - serial peripheral interface chip select control signal
2 Q output Serial data output from SPI bus interface for reading EEPROM data
3 W input Write Protect input signal to enable/disable write operations to memory
4 VSS power_in Ground reference for 4-Kbit EEPROM, 512 bytes with SPI interface
5 D input Serial data input to SPI bus for writing data to EEPROM
6 C input Serial Clock input for SPI bus synchronization, supports up to 20 MHz for VCC ≥ 4.5 V
7 HOLD input Hold input signal to suspend SPI communication without chip reset
8 VCC power_in Supply voltage input, operating range 1.7 V to 5.5 V with extended temperature to 105 °C

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Memory
Pins 8

CAD (KiCad official)

  • Symbol: M95040-DRMN8TP
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: m95040-drmn8tp-etched.step / m95040-drmn8tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); m95040-drmn8tp.step / m95040-drmn8tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (39 pp, sha256 f3906208afe31579, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF