component
M95040-DRMN3TP
Public Made by Adomby adom
STMicroelectronics EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownM95040-DRMN3TP
STMicroelectronics · EEPROM · SOIC-8
M95040-DRMN3TP from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip Select (S) input; drive low to select device and high to deselect device, causing Serial Data output (Q) to enter high impedance state. |
| 2 | Q | tri_state | Serial Data Output (Q); shifts data out on falling edge of Serial Clock (C), most significant bit first; enters high impedance when device is deselected or during Hold condition. |
| 3 | W | input | Write Protect (W) input; when held low during write instructions (WRSR, WRID, LID), prevents modification of protected areas and Status Register. |
| 4 | VSS | power_in | Ground; reference for all signals including VCC supply voltage. |
| 5 | D | input | Serial Data Input (D); receives instructions, addresses, and write data with values latched on rising edge of Serial Clock (C), most significant bit first. |
| 6 | C | input | Serial Clock (C) input; synchronizes serial interface timing with input data latched on rising edge and output data changing after falling edge. |
| 7 | HOLD | input | Hold (HOLD) input; when driven low with clock low, pauses serial communications without deselecting device; Serial Data Output (Q) enters high impedance during Hold condition. |
| 8 | VCC | power_in | Supply voltage; operating range 1.7 V to 5.5 V for M95040-DR variant (voltage range R, temperature range 3: -40 to 125 °C). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
M95040-DRMN3TP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
m95040-drmn3tp-etched.step/m95040-drmn3tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m95040-drmn3tp.step/m95040-drmn3tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (41 pp, sha256
e5c0570ecb5cd914, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).