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M93C86-RMN3TP
Public Made by Adomby adom
STMicroelectronics EEPROM, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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M93C86-RMN3TP
STMicroelectronics · EEPROM · SOP-8
M93C86-RMN3TP from STMicroelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip Select input; must be driven to VSS during power-up (a pull-down is recommended), and must be brought low for at least tSLSH (200 ns min) between consecutive instruction cycles. |
| 2 | C | input | Serial Clock input, DC to 2 MHz, with minimum 200 ns high time and 200 ns low time. |
| 3 | D | input | Serial Data input, sampled on the rising edge of Serial Clock (C) with 50 ns set-up and 50 ns hold times. |
| 4 | Q | output | Serial Data output that also gives the READY/BUSY status (Q=0 busy, Q=1 ready) during a write or erase cycle when S is high, and is Hi-Z when the device is deselected. |
| 5 | VSS | power_in | Ground reference. |
| 6 | ORG | input | Organization Select: x16 when left unconnected or tied to VCC, x8 when tied to VSS; should be set to VSS or VCC in Standby for minimum current. |
| 7 | DU | unconnected | Don't Use pin reserved for ST test sequences; it may be left unconnected or connected to VCC or VSS. |
| 8 | VCC | power_in | Supply voltage of 1.8 V to 5.5 V (absolute maximum 6.5 V), to be decoupled with 10 nF to 100 nF close to the VCC/VSS pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
M93C86-RMN3TP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
m93c86-rmn3tp-etched.step/m93c86-rmn3tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m93c86-rmn3tp.step/m93c86-rmn3tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (31 pp, sha256
ea011e1cc0d30be7, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# M93C86-RMN3TP
**STMicroelectronics** · EEPROM · SOP-8
M93C86-RMN3TP from STMicroelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip Select input; must be driven to VSS during power-up (a pull-down is recommended), and must be brought low for at least tSLSH (200 ns min) between consecutive instruction cycles. |
| 2 | C | input | Serial Clock input, DC to 2 MHz, with minimum 200 ns high time and 200 ns low time. |
| 3 | D | input | Serial Data input, sampled on the rising edge of Serial Clock (C) with 50 ns set-up and 50 ns hold times. |
| 4 | Q | output | Serial Data output that also gives the READY/BUSY status (Q=0 busy, Q=1 ready) during a write or erase cycle when S is high, and is Hi-Z when the device is deselected. |
| 5 | VSS | power_in | Ground reference. |
| 6 | ORG | input | Organization Select: x16 when left unconnected or tied to VCC, x8 when tied to VSS; should be set to VSS or VCC in Standby for minimum current. |
| 7 | DU | unconnected | Don't Use pin reserved for ST test sequences; it may be left unconnected or connected to VCC or VSS. |
| 8 | VCC | power_in | Supply voltage of 1.8 V to 5.5 V (absolute maximum 6.5 V), to be decoupled with 10 nF to 100 nF close to the VCC/VSS pins. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `M93C86-RMN3TP`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `m93c86-rmn3tp-etched.step` / `m93c86-rmn3tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m93c86-rmn3tp.step` / `m93c86-rmn3tp.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589917637799927808) (31 pp, sha256 `ea011e1cc0d30be7`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/m93c86-rmn3tp-datasheet.pdf)