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M93C56-RMN6TP

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STMicroelectronics EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs m93c56-rmn6tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers m93c56-rmn6tp: viewers · Ray 4d ago
m93c56-rmn6tp-etched.fit.json m93c56-rmn6tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
m93c56-rmn6tp-etched.glb m93c56-rmn6tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
m93c56-rmn6tp-etched.step m93c56-rmn6tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
m93c56-rmn6tp.glb Publish 0.1.0 · Ray 4d ago
m93c56-rmn6tp.kicad_mod Publish 0.1.0 · Ray 4d ago
m93c56-rmn6tp.kicad_sym Publish 0.1.0 · Ray 4d ago
m93c56-rmn6tp.lbr Publish 0.1.0 · Ray 4d ago
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README.md Initial commit: component/m93c56-rmn6tp · Ray 4d ago

M93C56-RMN6TP

STMicroelectronics · EEPROM · SOIC-8

M93C56-RMN6TP from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S input Chip Select input; must be driven to VSS during power-up and is brought low between instructions, and a rising edge on S starts each instruction.
2 C input Serial Clock input with a maximum clock rate of 2 MHz; data is sampled on the rising edge and C must be held low when S rises.
3 D input Serial Data input that carries the start bit, op-code, address and data bits, sampled on the rising edge of C.
4 Q output Serial Data output that shifts out read data and gives the READY/BUSY status (Q=0 busy, Q=1 ready) and is high impedance when the device is not selected.
5 VSS power_in Ground reference for the device.
6 ORG input Organization Select: connected to VSS selects x8, and left unconnected or tied to VCC selects x16, and it should be set to VSS or VCC in Standby for minimum current.
7 DU unconnected Don't Use pin reserved for ST test sequences; it may be left unconnected or connected to VCC or VSS.
8 VCC power_in Supply voltage of 1.8 V to 5.5 V for M93C56-R, with a 10 nF to 100 nF decoupling capacitor recommended close to the VCC/VSS pins.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8
Category Memory
Pins 8

CAD (KiCad official)

  • Symbol: M93C56-RMN6TP
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: m93c56-rmn6tp-etched.step / m93c56-rmn6tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); m93c56-rmn6tp.step / m93c56-rmn6tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (35 pp, sha256 7b1f76e6c602697a, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF