M74HCT4094ADTR2G

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  "slug": "m74hct4094adtr2g",
  "title": "M74HCT4094ADTR2G",
  "brief": "onsemi Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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  "component": {
    "mpn": "M74HCT4094ADTR2G",
    "manufacturer": "onsemi",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shift Registers",
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      "lbr": "m74hct4094adtr2g.lbr"
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    "distributor_links": {
      "lcsc": "C903823"
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    "distributor_check": {
      "checked_at": "2026-10-18T22:12:01Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
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      "mouser": {
        "pn": null,
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    },
    "pins": [
      {
        "number": "1",
        "name": "STR",
        "type": "input",
        "description": "Strobe input: when high, the data in the 8-bit shift register is transferred to the storage register."
      },
      {
        "number": "2",
        "name": "D",
        "type": "input",
        "description": "Serial data input to the shift register, with a minimum set-up time of 10 ns and minimum hold time of 3 ns to CP at VCC = 4.5 V."
      },
      {
        "number": "3",
        "name": "CP",
        "type": "input",
        "description": "Clock input: data is shifted on positive (LOW-to-HIGH) clock transitions, with a minimum clock pulse width of 16 ns at VCC = 4.5 V."
      },
      {
        "number": "4",
        "name": "QP0",
        "type": "tri_state",
        "description": "Parallel three-state output from storage stage 0, high impedance when OE is low."
      },
      {
        "number": "5",
        "name": "QP1",
        "type": "tri_state",
        "description": "Parallel three-state output from storage stage 1, high impedance when OE is low."
      },
      {
        "number": "6",
        "name": "QP2",
        "type": "tri_state",
        "description": "Parallel three-state output from storage stage 2, high impedance when OE is low."
      },
      {
        "number": "7",
        "name": "QP3",
        "type": "tri_state",
        "description": "Parallel three-state output from storage stage 3, high impedance when OE is low."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for all voltages (0 V)."
      },
      {
        "number": "9",
        "name": "QS1",
        "type": "output",
        "description": "Serial output taken from the seventh register stage, updated on the positive clock edge, for cascading devices."
      },
      {
        "number": "10",
        "name": "QS2",
        "type": "output",
        "description": "Serial output from the eighth (last) shift register stage, updated on the negative (HIGH-to-LOW) clock edge, for cascading devices."
      },
      {
        "number": "11",
        "name": "QP7",
        "type": "tri_state",
        "description": "Parallel three-state output from storage stage 7, high impedance when OE is low."
      },
      {
        "number": "12",
        "name": "QP6",
        "type": "tri_state",
        "description": "Parallel three-state output from storage stage 6, high impedance when OE is low."
      },
      {
        "number": "13",
        "name": "QP5",
        "type": "tri_state",
        "description": "Parallel three-state output from storage stage 5, high impedance when OE is low."
      },
      {
        "number": "14",
        "name": "QP4",
        "type": "tri_state",
        "description": "Parallel three-state output from storage stage 4, high impedance when OE is low."
      },
      {
        "number": "15",
        "name": "OE",
        "type": "input",
        "description": "Output enable: when high, the parallel outputs QPn are enabled; when low, they are placed in the high-impedance OFF state."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply, 4.5 V to 5.5 V referenced to GND."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
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        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet covers MC74HCT4094A; the MPN given is M74HCT4094ADTR2G. The suffix matches the MC74HCT; Pin numbers were mapped from the Figure 1 pin assignment text, which is extracted without its spatia; The pin assignment is shared by the SOIC-16 and TSSOP-16 variants. The TSSOP-16 outline drawing (pag",
          "3/16 pins cited to the wrong page (name found elsewhere): ['11:QP7@p5', '12:QP6@p5', '14:QP4@p5']"
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        "at": "2026-10-18T22:11:43"
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      "pins": {
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        "described": 16,
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      "Manufacturer": "onsemi",
      "Package": "TSSOP-16",
      "Category": "Logic",
      "Pins": "16"
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          "name": "Maximum Low-Level Output Voltage",
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          "name": "Maximum Low-Level Output Voltage",
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          "name": "Maximum Input Leakage Current",
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          "name": "Maximum Tri-State Output Leakage Current",
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          "typ": null,
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          "conditions": "VIN = VCC or GND; VOUT = VCC or GND; VCC 5.5 V",
          "source_page": 6,
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          "name": "Maximum Quiescent Supply Current",
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          "source_page": 6,
          "source": "datasheet"
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          "name": "Additional Quiescent Supply Current",
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          "name": "Additional Quiescent Supply Current",
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          "max": 2.4,
          "conditions": "VIN = 2.4 V, any one input; VIN = VCC or GND, other inputs; IOUT = 0 A; VCC 5.5 V",
          "source_page": 6,
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        {
          "name": "Maximum Propagation Delay CP to QS1",
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          "min": null,
          "typ": null,
          "max": 45,
          "conditions": "Figure 7; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
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          "name": "Maximum Propagation Delay CP to QS2",
          "symbol": "tPHL, tPLH",
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          "min": null,
          "typ": null,
          "max": 41,
          "conditions": "Figure 7; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
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          "name": "Maximum Propagation Delay CP to QPn",
          "symbol": "tPHL, tPLH",
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          "min": null,
          "typ": null,
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          "conditions": "Figure 7; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
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          "name": "Maximum Propagation Delay STR to QPn",
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          "conditions": "Figure 8; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
          "source_page": 7,
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          "name": "Maximum 3-State Output Enable Time OE to QPn",
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          "min": null,
          "typ": null,
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          "conditions": "Figure 9; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
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          "name": "Maximum 3-State Output Disable Time OE to QPn",
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          "min": null,
          "typ": null,
          "max": 38,
          "conditions": "Figure 9; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
          "source_page": 7,
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          "name": "Maximum Output Transition Time",
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          "conditions": "Figure 7; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
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          "name": "Minimum Clock Pulse Width High or Low",
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          "min": 24,
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          "conditions": "Figure 7; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
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          "typ": null,
          "max": null,
          "conditions": "Figure 10; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
          "source_page": 7,
          "source": "datasheet"
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          "name": "Minimum Set-up Time CP to STR",
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          "min": 30,
          "typ": null,
          "max": null,
          "conditions": "Figure 8; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
          "source_page": 7,
          "source": "datasheet"
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          "name": "Minimum Hold Time D to CP",
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          "min": 3,
          "typ": null,
          "max": null,
          "conditions": "Figure 10; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
          "source_page": 7,
          "source": "datasheet"
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          "name": "Minimum Hold Time CP to STR",
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          "min": 0,
          "typ": null,
          "max": null,
          "conditions": "Figure 8; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
          "source_page": 7,
          "source": "datasheet"
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          "typ": null,
          "max": null,
          "conditions": "Figure 7; tf = tr = 6 ns, CL = 50 pF; VCC 4.5 V",
          "source_page": 7,
          "source": "datasheet"
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          "name": "Maximum Input Capacitance",
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          "min": null,
          "typ": null,
          "max": 10,
          "conditions": "",
          "source_page": 7,
          "source": "datasheet"
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          "name": "Maximum Output Capacitance",
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          "min": null,
          "typ": null,
          "max": 15,
          "conditions": "",
          "source_page": 7,
          "source": "datasheet"
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