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M484SIDAE2U

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Nuvoton Tech Microcontroller Units (MCUs/MPUs/SOCs), LQFP-64(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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M484SIDAE2U

Nuvoton Tech · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(7x7)

M484SIDAE2U from Nuvoton Tech, in a LQFP-64(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB.6 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 6 analog input, UART1_RXD, SD1_CLK, EBI_nWRH, EPWM1_CH5 or INT4.
2 PB.5 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 5, ACMP1 negative input, I2C0_SCL, UART5_TXD, SC0_CLK, EPWM0_CH0 or INT0.
3 PB.4 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 4, ACMP1_P1, I2C0_SDA, UART5_RXD, SC0_DAT, EPWM0_CH1 or INT1.
4 PB.3 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 3, ACMP0 negative input, UART1_TXD, SPI2_CLK, EPWM0_CH2 or INT2.
5 PB.2 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 2, ACMP0_P1, OPA0 output, UART1_RXD, SPI2_SS, EPWM0_CH3 or INT3.
6 PB.1 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 1, OPA0 negative input, UART2_TXD, SD0_CLK, I2C1_SCL, EPWM0_CH4 or EPWM0_BRAKE0.
7 PB.0 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 0, OPA0 positive input, UART2_RXD, SD0_CMD, I2C1_SDA, EPWM0_CH5 or EPWM0_BRAKE1.
8 PA.11 bidirectional General purpose digital I/O (MFP0) that can also be ACMP0_P0, EBI_nRD, SC2_PWR, SPI3_SS, SD1_DAT3, USCI0_CLK, I2C2_SCL, BPWM0_CH0 or DAC1_ST.
9 PA.10 bidirectional General purpose digital I/O (MFP0) that can also be ACMP1_P0, OPA1 output, EBI_nWR, SC2_RST, SPI3_CLK, SD1_DAT2, I2C2_SDA, DAC0_ST or SWDH_CLK.
10 PA.9 bidirectional General purpose digital I/O (MFP0) that can also be OPA1 negative input, EBI_MCLK, SC2_DAT, SPI3_MISO, SD1_DAT1, UART1_TXD, QEI1_A or SWDH_DAT.
11 PA.8 bidirectional General purpose digital I/O (MFP0) that can also be OPA1 positive input, EBI_ALE, SC2_CLK, SPI3_MOSI, SD1_DAT0, UART1_RXD, QEI1_B or INT4.
12 PF.6 bidirectional General purpose digital I/O (MFP0) that can also be EBI_ADR19, SC0_CLK, I2S0_LRCK, SPI1_MOSI, UART4_RXD, EBI_nCS0 or TAMPER0.
13 VDD power_in Power supply for I/O ports and LDO source for internal PLL and digital circuit.
14 PF.5 bidirectional General purpose digital I/O (MFP0) that can also be UART2_RXD, UART2_nCTS, BPWM0_CH4, EPWM0_SYNC_OUT, X32_IN (32.768 kHz crystal input) or EADC0_ST.
15 PF.4 bidirectional General purpose digital I/O (MFP0) that can also be UART2_TXD, UART2_nRTS, BPWM0_CH5 or X32_OUT (32.768 kHz crystal output).
16 PF.3 bidirectional General purpose digital I/O (MFP0) that can also be EBI_nCS0, UART0_TXD, I2C0_SCL, XT1_IN (4~24 MHz crystal input) or BPWM1_CH0.
17 PF.2 bidirectional General purpose digital I/O (MFP0) that can also be EBI_nCS1, UART0_RXD, I2C0_SDA, SPI0_CLK, XT1_OUT (4~24 MHz crystal output) or BPWM1_CH1.
18 PC.7 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD9, SPI2_MISO, UART4_TXD, SC2_PWR, UART0_nCTS, EPWM1_CH2, TM0 or INT3.
19 PC.6 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD8, SPI2_MOSI, UART4_RXD, SC2_RST, UART0_nRTS, EPWM1_CH3, TM1 or INT2.
20 PA.7 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD7, SPI2_CLK, SC2_DAT, UART0_TXD, I2C1_SCL, ACMP0_WLAT, TM2 or INT1.
21 PA.6 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD6, SPI2_SS, SD1_nCD, SC2_CLK, UART0_RXD, I2C1_SDA, ACMP1_WLAT, TM3 or INT0.
22 VSS power_in Ground pin for digital circuit.
23 VDD power_in Power supply for I/O ports and LDO source for internal PLL and digital circuit.
24 LDO_CAP passive LDO output pin.
25 PA.5 bidirectional General purpose digital I/O (MFP0) that can also be SPIM_D2, SPI0_MISO1, SD1_CMD, SC2_nCD, UART0_nCTS, UART5_TXD, I2C0_SCL, EPWM0_CH0 or QEI0_INDEX.
26 PA.4 bidirectional General purpose digital I/O (MFP0) that can also be SPIM_D3, SPI0_MOSI1, SD1_CLK, SC0_nCD, UART0_nRTS, UART5_RXD, I2C0_SDA, EPWM0_CH1 or QEI0_A.
27 PA.3 bidirectional General purpose digital I/O (MFP0) that can also be SPIM_SS, SPI0_SS, SPI1_SS, SD1_DAT3, SC0_PWR, UART4_TXD, UART1_TXD, I2C1_SCL or EPWM0_CH2.
28 PA.2 bidirectional General purpose digital I/O (MFP0) that can also be SPIM_CLK, SPI0_CLK, SPI1_CLK, SD1_DAT2, SC0_RST, UART4_RXD, UART1_RXD, I2C1_SDA or EPWM0_CH3.
29 PA.1 bidirectional General purpose digital I/O (MFP0) that can also be SPIM_MISO, SPI0_MISO0, SPI1_MISO, SD1_DAT1, SC0_DAT, UART0_TXD, I2C2_SCL, EPWM0_CH4 or DAC1_ST.
30 PA.0 bidirectional General purpose digital I/O (MFP0) that can also be SPIM_MOSI, SPI0_MOSI0, SPI1_MOSI, SD1_DAT0, SC0_CLK, UART0_RXD, I2C2_SDA, EPWM0_CH5 or DAC0_ST.
31 VDDIO power_in Power supply for PE.1, PE.8~PE.13.
32 nRESET input External reset input: active LOW, with an internal pull-up; set this pin low to reset to initial state.
33 PF.0 bidirectional General purpose digital I/O (MFP0) that can also be UART1_TXD, I2C1_SCL, BPWM1_CH0 or ICE_DAT (serial wire debugger data).
34 PF.1 bidirectional General purpose digital I/O (MFP0) that can also be UART1_RXD, I2C1_SDA, BPWM1_CH1 or ICE_CLK (serial wire debugger clock).
35 PC.5 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD5, SPIM_D2, SPI0_MISO1, UART2_TXD, I2C1_SCL, UART4_TXD or EPWM1_CH0.
36 PC.4 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD4, SPIM_D3, SPI0_MOSI1, SC1_nCD, I2S0_BCLK, UART2_RXD, I2C1_SDA, UART4_RXD or EPWM1_CH1.
37 PC.3 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD3, SPIM_SS, SPI0_SS, SC1_PWR, I2S0_MCLK, SPI2_MISO, UART2_nRTS, UART3_TXD or EPWM1_CH2.
38 PC.2 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD2, SPIM_CLK, SPI0_CLK, SC1_RST, I2S0_DI, SPI2_MOSI, UART2_nCTS, UART3_RXD or EPWM1_CH3.
39 PC.1 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD1, SPIM_MISO, SPI0_MISO0, SC1_DAT, I2S0_DO, SPI2_CLK, UART2_TXD, I2C0_SCL, EPWM1_CH4 or ACMP0_O.
40 PC.0 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD0, SPIM_MOSI, SPI0_MOSI0, SC1_CLK, I2S0_LRCK, SPI2_SS, UART2_RXD, I2C0_SDA, EPWM1_CH5 or ACMP1_O.
41 HSUSB_VRES passive HSUSB module reference resistor pin.
42 HSUSB_VDD33 power_in Power supply for HSUSB VDD33.
43 HSUSB_VBUS power_in HSUSB power supply from USB host or hub.
44 HSUSB_D- bidirectional HSUSB differential signal D-.
45 HSUSB_VSS power_in Ground pin for HSUSB.
46 HSUSB_D+ bidirectional HSUSB differential signal D+.
47 HSUSB_VDD12_CAP passive HSUSB internal 1.2V power regulator output decoupling pin; must be connected with a 1uF capacitor.
48 HSUSB_ID input HSUSB identification input.
49 VSS power_in Ground pin for digital circuit.
50 LDO_CAP passive LDO output pin.
51 VDD power_in Power supply for I/O ports and LDO source for internal PLL and digital circuit.
52 PC.14 bidirectional General purpose digital I/O (MFP0) that can also be EBI_AD11, SC1_nCD, SPI1_I2SMCLK, USCI0_CTL0, SPI0_CLK, EPWM0_SYNC_IN, ETM_TRACE_CLK, TM1, USB_VBUS_ST or HSUSB_VBUS_ST.
53 PB.15 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 15, EBI_AD12, SC1_PWR, SPI1_SS, UART0_nCTS, UART3_TXD, EPWM1_CH0, USB_VBUS_EN or HSUSB_VBUS_EN.
54 PB.14 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 14, EBI_AD13, SC1_RST, SPI1_CLK, UART0_nRTS, UART3_RXD, EPWM1_CH1 or CLKO.
55 PB.13 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 13, DAC1_OUT, ACMP0_P3, ACMP1_P3, EBI_AD14, SC1_DAT, SPI1_MISO, UART0_TXD or EPWM1_CH2.
56 PB.12 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 12, DAC0_OUT, ACMP0_P2, ACMP1_P2, EBI_AD15, SC1_CLK, SPI1_MOSI, UART0_RXD or SD0_nCD.
57 AVDD power_in Power supply for internal analog circuit.
58 VREF power_in ADC reference voltage input; this pin needs to be connected with a 1uF capacitor.
59 AVSS power_in Ground pin for analog circuit.
60 PB.11 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 11, EBI_ADR16, UART0_nCTS, UART4_TXD, I2C1_SCL, SPI4_CLK, BPWM1_CH0 or HSUSB_VBUS_ST.
61 PB.10 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 10, EBI_ADR17, USCI1_CTL0, UART0_nRTS, UART4_RXD, I2C1_SDA, SPI4_SS, BPWM1_CH1 or HSUSB_VBUS_EN.
62 PB.9 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 9, EBI_ADR18, USCI1_CTL1, UART0_TXD, UART1_nCTS, SPI4_MISO, BPWM1_CH2 or INT7.
63 PB.8 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 8, EBI_ADR19, USCI1_CLK, UART0_RXD, UART1_nRTS, SPI4_MOSI, BPWM1_CH3 or INT6.
64 PB.7 bidirectional General purpose digital I/O (MFP0) that can also be EADC0 channel 7, EBI_nWRL, USCI1_DAT0, UART1_TXD, SD1_CMD, EPWM1_BRAKE0, EPWM1_CH4, INT5, USB_VBUS_ST or ACMP0_O.

Key specifications

Parameter Value
Manufacturer Nuvoton Tech
Package LQFP-64(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Power Supply VDD-VSS -0.3 4 V 367
VDDIO Power Supply VDDIO-VSS -0.3 4 V 367
Variations between different power pins /VDDX, VDD/ 50 mV 367
Allowed voltage difference for VDD and AVDD /VDD -AVDD/ 50 mV 367
Input Voltage on 5V-tolerance GPIO VIN 5.5 V 367
Maximum Current into VDD IDD 200 mA 367
Maximum Current into VDDIO IDDIO 100 mA 367
Maximum Current out of VSS ISS 100 mA 367
Maximum Current sunk by a I/O Pin IIO 20 mA 367
Maximum Current Sourced by a I/O Pin IIO 20 mA 367
Maximum Current Sunk by Total I/O Pins IIO 100 mA 367
Maximum Current Sourced by Total I/O Pins IIO 100 mA 367
Operating Temperature TA -40 105 °C 367
Junction temperature TJ -40 125 °C 367
Storage Temperature TST -65 150 °C 367
Operation Voltage VDD 1.8 3.6 V 369
Power supply for PA.0 ~ 5 VDDIO 1.8 3.6 V 369
Internal AHB clock frequency fHCLK 192 MHz 369
LDO Output Voltage VLDO 1.26 V 369
Band-gap Voltage VBG 1.17 1.23 V VDD = 1.8 V ~ 3.6 V 369
LDO Output capacitance on each pin CLDO 2.2 uF 369
Input Low Voltage (TTL input) VIL1 0.8 V VDD = VDDIO = 3.6 V 379
Input Low Voltage (TTL input) VIL1 0.56 V VDD = VDDIO = 1.8 V 379
Input High Voltage (TTL input) VIH1 2 V VDD = VDDIO = 3.6V 379
Input High Voltage (TTL input) VIH1 1.04 V VDD = VDDIO = 1.8V 379
Input Leakage Current ILK -1 1 µA VDD = VDDIO = 3.6V, 0 < VIN < VDD, Open-drain or input only mode 379
Input Pull Up Resistor RPU 50 kΩ VDD = VDDIO = 3.3V 379
Input Pull down Resistor RPD 50 kΩ VDD = VDDIO = 3.3V 379
Source Current (Push-pull) ISR4 -18 mA VDD = VDDIO = 3.3V 379
Sink Current (Push-pull) ISK1 17 mA VDD = VDDIO = 3.3V 380
I/O pin capacitance CIO 5 pF 380
Internal nRESET pin pull up resistor RRST 50 kΩ 380
HIRC Internal Oscillator Frequency fHRC -1 1 % TA = 25 °C, VDD = 3.3V 384
HIRC Internal Oscillator Frequency fHRC -3 3 % -40C ~ +105 °C, VDD = 1.8 ~ 3.6V 385
LIRC Oscillator Frequency FLRC 5 20 kHz VDD=1.8V3.6V, TA=-40105°C 385
LVR Threshold Voltage VLVR 1.4 1.48 1.56 V TA = 25 °C 387
Brown-out Voltage (Falling edge) VBOD_F 2.9 3 3.1 V BODVL [2:0] = 111 387
Brown-out Voltage (Falling edge) VBOD_F 1.5 1.6 1.7 V BODVL [2:0] = 000 387
Reset Voltage VPOR 1.47 V 388
Internal reference voltage VREF_INT 1.6 V 388
ADC Integral Non-Linearity Error INL -2.94 -1.32 LSB VREF = AVDD 391
ADC Differential Non-Linearity Error DNL 1.25 2 LSB VREF = AVDD 391
ADC Gain error EG 2.5 3.12 LSB VREF = AVDD 391
ADC Offset error EOFFSET 2.44 3.69 LSB VREF = AVDD 391
ADC Absolute Error EA 4.69 6.75 LSB VREF = AVDD 391
Temperature Sensor Temperature Coefficient Tc -1.77 -1.82 -1.84 mV/°C 392
DAC Differential non-linearity error DNL -2 2 LSB 12-bit mode 392
DAC Integral non-linearity error INL -4 4 LSB 12-bit mode 392
DAC Offset Error OE -30 30 LSB 12-bit mode, DACOUT buffer ON 393
DAC Gain Error GE -5 5 LSB 12-bit mode, DACOUT buffer ON 393
Flash Supply Voltage VFLA 1.08 1.32 V TA = 25°C 396
Flash Endurance NENDUR 10000 cycles TA = 25°C 396
Flash Data Retention TRET 10 year TA = 25°C 396
Flash Page Erase Time TERASE 92 160 mS TA = 25°C 396
Flash Read Current IDD1 4.12 mA TA = 25°C 396
Normal Run current, all peripherals disable IDD 34 mA Normal Run, executed from Flash, VDD = 3.3V, 192 MHz, HXT, PLL, TA = 25 °C 370
Thermal resistance junction-ambient 64-pin LQFP(7x7 mm) θJA 58 ℃/Watt JESD51-2 (Section 9 table) 414

CAD (KiCad official)

  • Symbol: M484SIDAE2U
  • Footprint: Package_QFP:LQFP-64_7x7mm_P0.4mm
  • 3D model: LQFP-64(7x7) (KiCad packages3D, STEP)
  • 3D model files: m484sidae2u-etched.step / m484sidae2u-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); m484sidae2u.step / m484sidae2u.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nuvoton Tech datasheet (473 pp, sha256 37dba3e93163f5d2, retrieved 2026-10-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF