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M482SIDAE

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Nuvoton Tech Microcontrollers (MCU/MPU/SOC), LQFP-64(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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M482SIDAE

Nuvoton Tech · Microcontrollers (MCU/MPU/SOC) · LQFP-64(7x7)

M482SIDAE from Nuvoton Tech, in a LQFP-64(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB.6 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH6 analog input, EBI_nWRH, UART1_RXD, INT4, and USB_VBUS_EN (MFP14).
2 PB.5 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH5 analog input, ACMP1_N, SPI1_MISO, I2C0_SCL, and INT0.
3 PB.4 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH4 analog input, ACMP1_P1, SPI1_MOSI, I2C0_SDA, and INT1.
4 PB.3 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH3 analog input, ACMP0_N, SPI1_CLK, UART1_TXD, and INT2.
5 PB.2 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH2 analog input, OPA0_O, ACMP0_P1, SPI1_SS, UART1_RXD, and INT3.
6 PB.1 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH1 analog input, OPA0_N, SPI1_I2SMCLK, UART2_TXD, I2C1_SCL, and EPWM0_BRAKE0.
7 PB.0 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH0 analog input, OPA0_P, SD0_CMD, UART2_RXD, I2C1_SDA, and EPWM0_BRAKE1.
8 PA.11 bidirectional General purpose digital I/O (MFP0); alternates include ACMP0_P0 analog input, EBI_nRD, SPI2_SS, USCI0_CLK, I2C2_SCL, and DAC1_ST.
9 PA.10 bidirectional General purpose digital I/O (MFP0); alternates include ACMP1_P0 analog input, OPA1_O, EBI_nWR, SPI2_CLK, I2C2_SDA, and DAC0_ST.
10 PA.9 bidirectional General purpose digital I/O (MFP0); alternates include OPA1_N analog input, EBI_MCLK, SPI2_MISO, UART1_TXD, QEI1_A, and TM2_EXT.
11 PA.8 bidirectional General purpose digital I/O (MFP0); alternates include OPA1_P analog input, EBI_ALE, SPI2_MOSI, UART1_RXD, QEI1_B, and TM3_EXT.
12 PF.6 bidirectional General purpose digital I/O (MFP0); alternates include EBI_ADR19, SC0_CLK, I2S0_LRCK, SPI0_MOSI, UART4_RXD, EBI_nCS0, and TAMPER0.
13 VDD power_in Power supply for I/O ports and LDO source for internal PLL and digital circuit.
14 PF.5 bidirectional General purpose digital I/O (MFP0); alternates include UART2_RXD, UART2_nCTS, BPWM0_CH4, EPWM0_SYNC_OUT, X32_IN (external 32.768 kHz crystal input), and EADC0_ST.
15 PF.4 bidirectional General purpose digital I/O (MFP0); alternates include UART2_TXD, UART2_nRTS, BPWM0_CH5, and X32_OUT (external 32.768 kHz crystal output).
16 PF.3 bidirectional General purpose digital I/O (MFP0); alternates include EBI_nCS0, UART0_TXD, I2C0_SCL, XT1_IN (external 4~24 MHz crystal input), and BPWM1_CH0.
17 PF.2 bidirectional General purpose digital I/O (MFP0); alternates include EBI_nCS1, UART0_RXD, I2C0_SDA, QSPI0_CLK, XT1_OUT (external 4~24 MHz crystal output), and BPWM1_CH1.
18 PC.7 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD9, SPI1_MISO, UART4_TXD, UART0_nCTS, I2C1_SMBAL, and INT3.
19 PC.6 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD8, SPI1_MOSI, UART4_RXD, UART0_nRTS, I2C1_SMBSUS, and INT2.
20 PA.7 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD7, SPI1_CLK, UART0_TXD, I2C1_SCL, ACMP0_WLAT, and INT1.
21 PA.6 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD6, SPI1_SS, SD1_nCD, UART0_RXD, I2C1_SDA, ACMP1_WLAT, and INT0.
22 VSS power_in Ground pin for digital circuit.
23 VDD power_in Power supply for I/O ports and LDO source for internal PLL and digital circuit.
24 LDO_CAP power_out LDO output pin.
25 PA.5 bidirectional General purpose digital I/O (MFP0); alternates include SPIM_D2, QSPI0_MISO1, SD1_CMD, UART0_nCTS, I2C0_SCL, and CAN0_TXD.
26 PA.4 bidirectional General purpose digital I/O (MFP0); alternates include SPIM_D3, QSPI0_MOSI1, SD1_CLK, UART0_nRTS, I2C0_SDA, and EPWM0_CH1.
27 PA.3 bidirectional General purpose digital I/O (MFP0); alternates include SPIM_SS, QSPI0_SS, SPI0_SS, SD1_DAT3, UART1_TXD, and I2C1_SCL.
28 PA.2 bidirectional General purpose digital I/O (MFP0); alternates include SPIM_CLK, QSPI0_CLK, SPI0_CLK, SD1_DAT2, UART1_RXD, and I2C1_SDA.
29 PA.1 bidirectional General purpose digital I/O (MFP0); alternates include SPIM_MISO, QSPI0_MISO0, SPI0_MISO, SD1_DAT1, UART0_TXD, and UART1_nCTS.
30 PA.0 bidirectional General purpose digital I/O (MFP0); alternates include SPIM_MOSI, QSPI0_MOSI0, SPI0_MOSI, SD1_DAT0, UART0_RXD, and UART1_nRTS.
31 VDDIO power_in Power supply for PA.0~PA.5.
32 nRESET input External reset input: active LOW, with an internal pull-up; setting this pin low resets the chip to its initial state.
33 PF.0 bidirectional General purpose digital I/O (MFP0); alternates include UART1_TXD, I2C1_SCL, BPWM1_CH0, and ICE_DAT (serial wired debugger data).
34 PF.1 bidirectional General purpose digital I/O (MFP0); alternates include UART1_RXD, I2C1_SDA, BPWM1_CH1, and ICE_CLK (serial wired debugger clock).
35 PC.5 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD5, SPIM_D2, QSPI0_MISO1, UART2_TXD, I2C1_SCL, CAN0_TXD, and UART4_TXD.
36 PC.4 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD4, SPIM_D3, QSPI0_MOSI1, SC1_nCD, I2S0_BCLK, and UART2_RXD.
37 PC.3 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD3, SPIM_SS, QSPI0_SS, SC1_PWR, I2S0_MCLK, UART2_nRTS, I2C0_SMBAL, and CAN1_TXD.
38 PC.2 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD2, SPIM_CLK, QSPI0_CLK, SC1_RST, I2S0_DI, UART2_nCTS, I2C0_SMBSUS, and CAN1_RXD.
39 PC.1 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD1, SPIM_MISO, QSPI0_MISO0, SC1_DAT, I2S0_DO, SPI1_CLK, and ACMP0_O.
40 PC.0 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD0, SPIM_MOSI, QSPI0_MOSI0, SC1_CLK, I2S0_LRCK, UART2_RXD, EPWM1_CH5, and ACMP1_O.
41 PD.3 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD10, USCI0_CTL1, SPI0_SS, UART3_nRTS, USCI1_CTL0, and UART0_TXD.
42 PD.2 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD11, USCI0_DAT1, SPI0_CLK, UART3_nCTS, SC2_RST, and UART0_RXD.
43 PD.1 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD12, USCI0_DAT0, SPI0_MISO, UART3_TXD, I2C2_SCL, and SC2_DAT.
44 PD.0 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD13, USCI0_CLK, SPI0_MOSI, UART3_RXD, I2C2_SDA, SC2_CLK, and TM2.
45 PA.12 bidirectional General purpose digital I/O (MFP0); alternates include I2S0_BCLK, UART4_TXD, I2C1_SCL, SPI2_SS, BPWM1_CH2, QEI1_INDEX, and USB_VBUS (power supply from USB host or HUB, MFP14).
46 PA.13 bidirectional General purpose digital I/O (MFP0); alternates include I2S0_MCLK, UART4_RXD, I2C1_SDA, SPI2_CLK, BPWM1_CH3, QEI1_A, and USB_D- (USB differential signal D-, MFP14).
47 PA.14 bidirectional General purpose digital I/O (MFP0); alternates include I2S0_DI, UART0_TXD, SPI2_MISO, I2C2_SCL, BPWM1_CH4, QEI1_B, and USB_D+ (USB differential signal D+, MFP14).
48 PA.15 bidirectional General purpose digital I/O (MFP0); alternates include I2S0_DO, UART0_RXD, SPI2_MOSI, I2C2_SDA, BPWM1_CH5, EPWM0_SYNC_IN, and USB_OTG_ID (MFP14).
49 VSS power_in Ground pin for digital circuit.
50 LDO_CAP power_out LDO output pin.
51 VDD power_in Power supply for I/O ports and LDO source for internal PLL and digital circuit.
52 PC.14 bidirectional General purpose digital I/O (MFP0); alternates include EBI_AD11, SC1_nCD, SPI0_I2SMCLK, USCI0_CTL0, QSPI0_CLK, EPWM0_SYNC_IN, and TM1.
53 PB.15 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH15 analog input, EBI_AD12, SPI0_SS, UART0_nCTS, UART3_TXD, EPWM1_CH0, TM0_EXT, and USB_VBUS_EN (MFP14).
54 PB.14 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH14 analog input, EBI_AD13, SPI0_CLK, UART0_nRTS, UART3_RXD, EPWM1_CH1, and CLKO.
55 PB.13 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH13 analog input, DAC1_OUT analog output, ACMP0_P3, ACMP1_P3, EBI_AD14, SPI0_MISO, and UART0_TXD.
56 PB.12 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH12 analog input, DAC0_OUT analog output, ACMP0_P2, ACMP1_P2, EBI_AD15, SPI0_MOSI, and UART0_RXD.
57 AVDD power_in Power supply for internal analog circuit.
58 VREF power_in ADC reference voltage input; this pin needs to be connected with a 1uF capacitor.
59 AVSS power_in Ground pin for analog circuit.
60 PB.11 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH11 analog input, EBI_ADR16, UART0_nCTS, UART4_TXD, I2C1_SCL, CAN0_TXD, and SPI0_I2SMCLK.
61 PB.10 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH10 analog input, EBI_ADR17, USCI1_CTL0, UART0_nRTS, UART4_RXD, I2C1_SDA, and CAN0_RXD.
62 PB.9 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH9 analog input, EBI_ADR18, USCI1_CTL1, UART0_TXD, UART1_nCTS, I2C1_SMBAL, and INT7.
63 PB.8 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH8 analog input, EBI_ADR19, USCI1_CLK, UART0_RXD, UART1_nRTS, I2C1_SMBSUS, and INT6.
64 PB.7 bidirectional General purpose digital I/O (MFP0); alternates include EADC0_CH7 analog input, EBI_nWRL, USCI1_DAT0, UART1_TXD, SD1_CMD, EBI_nCS0, ACMP0_O (MFP15), and INT5.

Key specifications

Parameter Value
Manufacturer Nuvoton Tech
Package LQFP-64(7x7)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD-VSS DC power supply VDD-VSS -0.3 4 V 348
VDDIO-VSS VDDIO power supply VDDIO-VSS -0.3 4 V 348
Input voltage on 5V-tolerance GPIO VIN 5.5 V 348
Maximum current into VDD IDD 200 mA 348
Maximum current into VDDIO IDDIO 100 mA 348
Maximum current out of VSS ISS 100 mA 348
Maximum current sunk by an I/O pin IIO 20 mA 348
Maximum current sourced by an I/O pin IIO 20 mA 348
Maximum current sunk by total I/O pins IIO 100 mA 348
Maximum current sourced by total I/O pins IIO 100 mA 348
Operating temperature TA -40 105 C 348
Junction temperature TJ -40 125 C 348
Storage temperature TST -65 150 C 348
Variation between different power pins /VDDX - VDD/ 50 mV 348
Allowed voltage difference for VDD and AVDD /VDD - AVDD/ 50 mV 348
Variation between different ground pins /VSSX - VSS/ 50 mV 348
Allowed voltage difference for VSS and AVSS /VSS - AVSS/ 50 mV 348
Internal AHB clock frequency fHCLK 192 MHz 350
VDD operation voltage VDD 1.8 3.6 V 350
Power supply for PA.0 ~ 5 (VDDIO) VDDIO 1.8 3.6 V 350
LDO output voltage VLDO 1.08 1.26 1.32 V 368
Internal oscillator (HIRC) frequency tolerance fHRC -1 1 % TA = 25 °C, VDD = 3.3V 366
Internal oscillator (HIRC) frequency tolerance fHRC -2 2 % -40C ~ +105 °C, VDD = 1.8 ~ 3.6V 366
HIRC supply voltage VHRC 1.8 3.6 V 365
External HXT oscillator frequency fHXT 4 24 MHz VDD = 1.8 ~ 3.6V 363
HXT temperature range THXT -40 105 C 363
HXT clock duty Clock Duty 45 50 55 % 363
LXT temperature range TLXT -40 105 C 364
LXT duty cycle Duty cycle 45 55 % 364
LIRC oscillator frequency FLRC 5 20 kHz VDD=1.8V3.6V, TA=-40105°C 366
PLL input clock fPLL_IN 4 24 MHz 366
PLL multiplier output clock fPLL_OUT 50 500 MHz 366
Input low voltage (TTL input) VIL1 0.8 V VDD = VDDIO = 3.6 V 360
Input low voltage (TTL input) VIL1 0.56 V VDD = VDDIO = 1.8 V 360
Input high voltage (TTL input) VIH1 2 V VDD = VDDIO = 3.6V 360
Input high voltage (TTL input) VIH1 1.04 V VDD = VDDIO = 1.8V 360
Input leakage current ILK -1 1 uA VDD = VDDIO = 3.6V, 0 < VIN < VDD, Open-drain or input only mode 360
Source current (push-pull, output HIGH) ISR4 -18 mA VDD = VDDIO = 3.3V 360
Source current (push-pull, output HIGH) ISR5 -10 mA VDD = VDDIO = 1.8V 360
Source current (push-pull, output HIGH) ISR6 -8 mA VDD = VDDIO = 1.8V 360
Sink current (push-pull, output LOW) ISK1 17 mA VDD = VDDIO = 3.3V 360
Sink current (push-pull, output LOW) ISK2 10 mA VDD = VDDIO = 1.8V 360
Sink current (push-pull, output LOW) ISK3 8 mA VDD = VDDIO = 1.8V 361
Low-voltage reset threshold voltage VLVR 1.4 1.48 1.56 ℃ TA = 105 ℃ 368
Brown-out voltage (falling edge) VBOD_F 2.9 3 3.1 V BODVL [2:0] = 111 368
Brown-out voltage (falling edge) VBOD_F 2.7 2.8 2.9 V BODVL [2:0] = 110 368
Brown-out voltage (falling edge) VBOD_F 2.5 2.6 2.7 V BODVL [2:0] = 101 368
Brown-out voltage (falling edge) VBOD_F 2.3 2.4 2.5 V BODVL [2:0] = 100 368
Brown-out voltage (falling edge) VBOD_F 2.1 2.2 2.3 V BODVL [2:0] = 011 368
Brown-out voltage (falling edge) VBOD_F 1.9 2 2.1 V BODVL [2:0] = 010 368
Brown-out voltage (falling edge) VBOD_F 1.7 1.8 1.9 V BODVL [2:0] = 001 368
Brown-out voltage (falling edge) VBOD_F 1.5 1.6 1.7 V BODVL [2:0] = 000 368
Input voltage high (USB FS driven) VIH 2 V 388
Input voltage low (USB FS) VIL 0.8 V 388
Output low (USB FS driven) VOL 0 0.3 V 388
Output high (USB FS driven) VOH 2.8 3.6 V 388
Temperature coefficient (temperature sensor) Tc -1.77 -1.82 -1.84 mV/°C 373
DAC analog supply voltage AVDD 1.8 3.6 V 373

CAD (KiCad official)

  • Symbol: M482SIDAE
  • Footprint: Package_QFP:LQFP-64_7x7mm_P0.4mm
  • 3D model: LQFP-64(7x7) (KiCad packages3D, STEP)
  • 3D model files: m482sidae-etched.step / m482sidae-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); m482sidae.step / m482sidae.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nuvoton Tech datasheet (401 pp, sha256 26fcd9069806e542, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF