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M482KIDAE
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Nuvoton Tech Microcontrollers (MCU/MPU/SOC), LQFP-128(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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M482KIDAE
Nuvoton Tech · Microcontrollers (MCU/MPU/SOC) · LQFP-128(14x14)
M482KIDAE from Nuvoton Tech, in a LQFP-128(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB.5 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH5, ACMP1_N, EBI_ADR0 and INT0. |
| 2 | PB.4 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH4, ACMP1_P1, EBI_ADR1 and INT1. |
| 3 | PB.3 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH3, ACMP0_N, EBI_ADR2 and INT2. |
| 4 | PB.2 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH2, ACMP0_P1, OPA0_O and INT3. |
| 5 | PC.12 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR4, UART0_TXD, I2C0_SCL and ECAP1_IC2. |
| 6 | PC.11 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR5, UART0_RXD, I2C0_SDA and ACMP1_O. |
| 7 | PC.10 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR6, SPI3_CLK, UART3_TXD and CAN1_TXD. |
| 8 | PC.9 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR7, SPI3_SS, UART3_RXD and CAN1_RXD. |
| 9 | PB.1 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH1, OPA0_N, EBI_ADR8 and SD0_CLK. |
| 10 | PB.0 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH0, OPA0_P, EBI_ADR9 and SD0_CMD. |
| 11 | VSS | power_in | Ground pin for digital circuit. |
| 12 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital circuit. |
| 13 | PA.11 | bidirectional | General purpose digital I/O (MFP0); alternates include ACMP0_P0, EBI_nRD, SC2_PWR and TM0_EXT. |
| 14 | PA.10 | bidirectional | General purpose digital I/O (MFP0); alternates include ACMP1_P0, OPA1_O, EBI_nWR and SC2_RST. |
| 15 | PA.9 | bidirectional | General purpose digital I/O (MFP0); alternates include OPA1_N, EBI_MCLK, SC2_DAT and QEI1_A. |
| 16 | PA.8 | bidirectional | General purpose digital I/O (MFP0); alternates include OPA1_P, EBI_ALE, SC2_CLK and TM3_EXT. |
| 17 | PC.13 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR10, SC2_nCD, CLKO and EADC0_ST. |
| 18 | PD.12 | bidirectional | General purpose digital I/O (MFP0); alternates include OPA2_O, EBI_nCS0, CAN1_RXD and INT5. |
| 19 | PD.11 | bidirectional | General purpose digital I/O (MFP0); alternates include OPA2_N, EBI_nCS1, CAN0_TXD and INT6. |
| 20 | PD.10 | bidirectional | General purpose digital I/O (MFP0); alternates include OPA2_P, EBI_nCS2, CAN0_RXD and INT7. |
| 21 | PG.2 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR11, SPI2_SS, I2C0_SMBAL and TM0. |
| 22 | PG.3 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR12, SPI2_CLK, I2C0_SMBSUS and TM1. |
| 23 | PG.4 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR13, SPI2_MISO and TM2. |
| 24 | PF.11 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR14, SPI2_MOSI, TAMPER5 and TM3. |
| 25 | PF.10 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR15, SC0_nCD, I2S0_BCLK and TAMPER4. |
| 26 | PF.9 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR16, SC0_PWR, I2S0_MCLK and TAMPER3. |
| 27 | PF.8 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR17, SC0_RST, I2S0_DI and TAMPER2. |
| 28 | PF.7 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR18, SC0_DAT, I2S0_DO and TAMPER1. |
| 29 | PF.6 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR19, SC0_CLK, UART4_RXD and TAMPER0. |
| 30 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital circuit. |
| 31 | PF.5 | bidirectional | General purpose digital I/O (MFP0); alternates include UART2_RXD, BPWM0_CH4, X32_IN (MFP10) and EADC0_ST. |
| 32 | PF.4 | bidirectional | General purpose digital I/O (MFP0); alternates include UART2_TXD, UART2_nRTS, BPWM0_CH5 and X32_OUT (MFP10). |
| 33 | PH.4 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR3 and SPI1_MISO. |
| 34 | PH.5 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR2 and SPI1_MOSI. |
| 35 | PH.6 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR1 and SPI1_CLK. |
| 36 | PH.7 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR0 and SPI1_SS. |
| 37 | PF.3 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_nCS0, UART0_TXD, I2C0_SCL and XT1_IN (MFP10). |
| 38 | PF.2 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_nCS1, UART0_RXD, I2C0_SDA and XT1_OUT (MFP10). |
| 39 | VSS | power_in | Ground pin for digital circuit. |
| 40 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital circuit. |
| 41 | PE.8 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR10, I2S0_BCLK, EPWM0_CH0 and TRACE_CLK. |
| 42 | PE.9 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR11, I2S0_MCLK, EPWM0_CH1 and TRACE_DATA0. |
| 43 | PE.10 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR12, I2S0_DI, EPWM0_CH2 and TRACE_DATA1. |
| 44 | PE.11 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR13, I2S0_DO, SPI2_SS and UART3_RXD. |
| 45 | PE.12 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR14, I2S0_LRCK, SPI2_I2SMCLK and TRACE_DATA3. |
| 46 | PE.13 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR15, I2C0_SCL, UART4_nRTS and EPWM0_CH5. |
| 47 | PC.8 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ADR16, I2C0_SDA, UART4_nCTS and UART1_RXD. |
| 48 | PC.7 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD9, SPI1_MISO, UART4_TXD and SC2_PWR. |
| 49 | PC.6 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD8, SPI1_MOSI, UART4_RXD and SC2_RST. |
| 50 | PA.7 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD7, SPI1_CLK, SC2_DAT and ACMP0_WLAT. |
| 51 | PA.6 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD6, SPI1_SS, SD1_nCD and SC2_CLK. |
| 52 | VSS | power_in | Ground pin for digital circuit. |
| 53 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital circuit. |
| 54 | LDO_CAP | passive | LDO output pin. |
| 55 | PA.5 | bidirectional | General purpose digital I/O (MFP0); alternates include SPIM_D2, QSPI0_MISO1, SD1_CMD and UART0_nCTS. |
| 56 | PA.4 | bidirectional | General purpose digital I/O (MFP0); alternates include SPIM_D3, QSPI0_MOSI1, SD1_CLK and UART0_nRTS. |
| 57 | PA.3 | bidirectional | General purpose digital I/O (MFP0); alternates include SPIM_SS, QSPI0_SS, SPI0_SS and SD1_DAT3. |
| 58 | PA.2 | bidirectional | General purpose digital I/O (MFP0); alternates include SPIM_CLK, QSPI0_CLK, SPI0_CLK and SD1_DAT2. |
| 59 | PA.1 | bidirectional | General purpose digital I/O (MFP0); alternates include SPIM_MISO, QSPI0_MISO0, SPI0_MISO and SD1_DAT1. |
| 60 | PA.0 | bidirectional | General purpose digital I/O (MFP0); alternates include SPIM_MOSI, QSPI0_MOSI0, SPI0_MOSI and DAC0_ST. |
| 61 | VDDIO | power_in | Power supply for PA.0~PA.5. |
| 62 | PE.14 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD8, UART2_TXD, CAN0_TXD and SD1_nCD. |
| 63 | PE.15 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD9, UART2_RXD and CAN0_RXD. |
| 64 | nRESET | input | External reset input, active LOW, with an internal pull-up; setting it low resets the chip to initial state. |
| 65 | PF.0 | bidirectional | General purpose digital I/O (MFP0); alternates include UART1_TXD, I2C1_SCL, BPWM1_CH0 and ICE_DAT. |
| 66 | PF.1 | bidirectional | General purpose digital I/O (MFP0); alternates include UART1_RXD, I2C1_SDA, BPWM1_CH1 and ICE_CLK. |
| 67 | PD.9 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD7, I2C2_SCL and UART2_nCTS. |
| 68 | PD.8 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD6, I2C2_SDA and UART2_nRTS. |
| 69 | PC.5 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD5, SPIM_D2, CAN0_TXD and EPWM1_CH0. |
| 70 | PC.4 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD4, SPIM_D3, QSPI0_MOSI1 and I2S0_BCLK. |
| 71 | PC.3 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD3, SPIM_SS, I2S0_MCLK and CAN1_TXD. |
| 72 | PC.2 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD2, SPIM_CLK, I2S0_DI and CAN1_RXD. |
| 73 | PC.1 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD1, SPIM_MISO, I2S0_DO and EPWM1_CH4. |
| 74 | PC.0 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD0, SPIM_MOSI, I2S0_LRCK and ACMP1_O. |
| 75 | VSS | power_in | Ground pin for digital circuit. |
| 76 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital circuit. |
| 77 | PG.9 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD0, SD1_DAT3, SPIM_D2 and BPWM0_CH5. |
| 78 | PG.10 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD1, SD1_DAT2, SPIM_D3 and BPWM0_CH4. |
| 79 | PG.11 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD2, SD1_DAT1, SPIM_SS and BPWM0_CH3. |
| 80 | PG.12 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD3, SD1_DAT0, SPIM_CLK and BPWM0_CH2. |
| 81 | PG.13 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD4, SD1_CMD, SPIM_MISO and BPWM0_CH1. |
| 82 | PG.14 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD5, SD1_CLK, SPIM_MOSI and BPWM0_CH0. |
| 83 | PG.15 | bidirectional | General purpose digital I/O (MFP0); alternates include SD1_nCD, CLKO and EADC0_ST. |
| 84 | PD.13 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD10, SD0_nCD, SPI0_I2SMCLK and SC2_nCD. |
| 85 | PA.12 | bidirectional | General purpose digital I/O (MFP0); alternates include I2S0_BCLK, UART4_TXD, CAN0_TXD and USB_VBUS (MFP14). |
| 86 | PA.13 | bidirectional | General purpose digital I/O (MFP0); alternates include I2S0_MCLK, UART4_RXD, CAN0_RXD and USB_D- (MFP14). |
| 87 | PA.14 | bidirectional | General purpose digital I/O (MFP0); alternates include I2S0_DI, UART0_TXD, I2C2_SCL and USB_D+ (MFP14). |
| 88 | PA.15 | bidirectional | General purpose digital I/O (MFP0); alternates include I2S0_DO, UART0_RXD, I2C2_SDA and USB_OTG_ID (MFP14). |
| 89 | NC | unconnected | Not connected (NC) per the datasheet pin table. |
| 90 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital circuit. |
| 91 | NC | unconnected | Not connected (NC) per the datasheet pin table. |
| 92 | NC | unconnected | Not connected (NC) per the datasheet pin table. |
| 93 | VSS | power_in | Ground pin for digital circuit. |
| 94 | NC | unconnected | Not connected (NC) per the datasheet pin table. |
| 95 | LDO_CAP | passive | LDO output pin; the datasheet requires a 1uF capacitor on this pin. |
| 96 | NC | unconnected | Not connected (NC) per the datasheet pin table. |
| 97 | PE.7 | bidirectional | General purpose digital I/O (MFP0); alternates include SD0_CMD, SPIM_D2, UART5_TXD and QEI1_INDEX. |
| 98 | PE.6 | bidirectional | General purpose digital I/O (MFP0); alternates include SD0_CLK, SPIM_D3, SPI3_I2SMCLK and UART5_RXD. |
| 99 | PE.5 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_nRD, SD0_DAT3, SPIM_SS and SPI3_SS. |
| 100 | PE.4 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_nWR, SD0_DAT2, SPIM_CLK and SPI3_CLK. |
| 101 | PE.3 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_MCLK, SD0_DAT1, SPIM_MISO and SPI3_MISO. |
| 102 | PE.2 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_ALE, SD0_DAT0, SPIM_MOSI and SPI3_MOSI. |
| 103 | VSS | power_in | Ground pin for digital circuit. |
| 104 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital circuit. |
| 105 | PE.1 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD10, QSPI0_MISO0, SC2_DAT and I2S0_BCLK. |
| 106 | PE.0 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD11, QSPI0_MOSI0, SC2_CLK and I2S0_MCLK. |
| 107 | PH.8 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD12, QSPI0_CLK, SC2_PWR and I2S0_DI. |
| 108 | PH.9 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD13, QSPI0_SS, SC2_RST and I2S0_DO. |
| 109 | PH.10 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD14, QSPI0_MISO1, SC2_nCD and I2S0_LRCK. |
| 110 | PH.11 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD15, QSPI0_MOSI1, UART4_RXD and UART0_RXD. |
| 111 | PD.14 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_nCS0, SPI3_I2SMCLK, SC1_nCD and EPWM0_CH4. |
| 112 | VSS | power_in | Ground pin for digital circuit. |
| 113 | LDO_CAP | passive | LDO output pin. |
| 114 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital circuit. |
| 115 | PC.14 | bidirectional | General purpose digital I/O (MFP0); alternates include EBI_AD11, SC1_nCD, QSPI0_CLK and EPWM0_SYNC_IN. |
| 116 | PB.15 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH15, EBI_AD12, SC1_PWR and UART3_TXD. |
| 117 | PB.14 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH14, EBI_AD13, SC1_RST and UART3_RXD. |
| 118 | PB.13 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH13, DAC1_OUT, ACMP0_P3 and ACMP1_P3. |
| 119 | PB.12 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH12, DAC0_OUT, ACMP0_P2 and ACMP1_P2. |
| 120 | AVDD | power_in | Power supply for internal analog circuit. |
| 121 | VREF | power_in | ADC reference voltage input; the datasheet requires a 1uF capacitor on this pin. |
| 122 | AVSS | power_in | Ground pin for analog circuit. |
| 123 | PB.11 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH11, EBI_ADR16, UART0_nCTS and I2C1_SCL. |
| 124 | PB.10 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH10, EBI_ADR17, UART0_nRTS and UART4_RXD. |
| 125 | PB.9 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH9, EBI_ADR18, UART0_TXD and INT7. |
| 126 | PB.8 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH8, EBI_ADR19, UART0_RXD and INT6. |
| 127 | PB.7 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH7, EBI_nWRL, UART1_TXD and INT5. |
| 128 | PB.6 | bidirectional | General purpose digital I/O (MFP0); alternates include EADC0_CH6, EBI_nWRH, UART1_RXD and INT4. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | LQFP-128(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 128 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Power Supply (VDD-VSS) | VDD-VSS | -0.3 | 4 | V | 348 | ||
| VDDIO Power Supply (VDDIO-VSS) | VDDIO-VSS | -0.3 | 4 | V | 348 | ||
| Input Voltage on 5V-tolerance GPIO | VIN | 5.5 | V | 348 | |||
| Maximum Current into VDD | IDD | 200 | mA | 348 | |||
| Maximum Current into VDDIO | IDDIO | 100 | mA | 348 | |||
| Maximum Current out of VSS | ISS | 100 | mA | 348 | |||
| Maximum Current sunk by a I/O Pin | IIO | 20 | mA | 348 | |||
| Maximum Current Sourced by a I/O Pin | IIO | 20 | mA | 348 | |||
| Maximum Current Sunk by Total I/O Pins | 100 | mA | 348 | ||||
| Maximum Current Sourced by Total I/O Pins | 100 | mA | 348 | ||||
| Operating Temperature | TA | -40 | 105 | C | 348 | ||
| Junction temperature | TJ | -40 | 125 | C | 348 | ||
| Storage Temperature | TST | -65 | 150 | C | 348 | ||
| /VDD - AVDD/ Allowed voltage difference for VDD and AVDD | /VDD-AVDD/ | 50 | mV | 348 | |||
| Internal AHB clock frequency | fHCLK | 192 | MHz | 350 | |||
| Operation Voltage | VDD | 1.8 | 3.6 | V | 350 | ||
| Power supply for PA.0 ~ 5 | VDDIO | 1.8 | 3.6 | V | 350 | ||
| LDO Output Voltage (general operating conditions) | VLDO | 1.08 | 1.2 | 1.32 | V | 350 | |
| Input Low Voltage (TTL input) | VIL1 | 0.8 | V | VDD = VDDIO = 3.6 V | 360 | ||
| Input Low Voltage (TTL input) | VIL1 | 0.56 | V | VDD = VDDIO = 1.8 V | 360 | ||
| Input High Voltage (TTL input) | VIH1 | 2 | V | VDD = VDDIO = 3.6V | 360 | ||
| Input High Voltage (TTL input) | VIH1 | 1.04 | V | VDD = VDDIO = 1.8V | 360 | ||
| Input Leakage Current | ILK | -1 | 1 | uA | VDD = VDDIO = 3.6V, 0 < VIN < VDD, Open-drain or input only mode | 360 | |
| Source Current (push-pull, output HIGH) | ISR4 | -18 | mA | Push-pull mode, output HIGH, VIN=(VDD-0.4)V; VDD = VDDIO = 3.3V | 360 | ||
| Source Current (push-pull, output HIGH) | ISR5 | -10 | mA | Push-pull mode, output HIGH, VIN=(VDD-0.4)V; VDD = VDDIO = 1.8V | 360 | ||
| Source Current (push-pull, output HIGH) | ISR6 | -8 | mA | Push-pull mode, output HIGH, VIN=(VDD-0.4)V; VDD = VDDIO = 1.8V | 360 | ||
| Sink Current (push-pull, output LOW) | ISK1 | 17 | mA | Push-pull mode, output LOW, VIN=(VSS+0.4)V; VDD = VDDIO = 3.3V | 360 | ||
| Sink Current (push-pull, output LOW) | ISK2 | 10 | mA | Push-pull mode, output LOW, VIN=(VSS+0.4)V; VDD = VDDIO = 1.8V | 360 | ||
| Sink Current (push-pull, output LOW) | ISK3 | 8 | mA | Push-pull mode, output LOW, VIN=(VSS+0.4)V; VDD = VDDIO = 1.8V | 361 | ||
| HXT Operating Voltage | VDD | 1.8 | 3.6 | V | 362 | ||
| Oscillator frequency (HXT) | fHXT | 4 | 24 | MHz | VDD = 1.8 ~ 3.6V | 362 | |
| HXT Temperature Range | THXT | -40 | 105 | C | 362 | ||
| HXT Clock Duty | 45 | 50 | 55 | % | 363 | ||
| LXT Operation Voltage | VDD | 1.8 | 3.6 | V | 364 | ||
| LXT Temperature | TLXT | -40 | 105 | C | 364 | ||
| LXT Duty cycle | 45 | 55 | % | 364 | |||
| Clock High Time (LXT OSC input) | tCHCX | 450 | ns | 365 | |||
| Clock Low Time (LXT OSC input) | tCLCX | 450 | ns | 365 | |||
| HIRC Supply voltage | VHRC | 1.8 | 3.6 | V | 365 | ||
| Internal Oscillator Frequency (HIRC) | -1 | 1 | % | TA = 25 °C, VDD = 3.3V | 366 | ||
| Internal Oscillator Frequency (HIRC) | -2 | 2 | % | -40 °C ~ +105 °C, VDD = 1.8 ~ 3.6V | 366 | ||
| LIRC Supply voltage | VLRC | 1.8 | 3.6 | V | 366 | ||
| LIRC Oscillator Frequency | FLRC | 5 | 20 | kHz | VDD=1.8V |
366 | |
| PLL input clock | fPLL_IN | 4 | 24 | MHz | 366 | ||
| PLL multiplier output clock | fPLL_OUT | 50 | 500 | MHz | 366 | ||
| DC Power Supply (LDO) | VDD | 1.8 | 3.6 | V | 368 | ||
| LDO Output Voltage | VLDO | 1.08 | 1.26 | 1.32 | V | 368 | |
| AVDD Supply Voltage (LVR) | AVDD | 0 | 3.6 | V | 368 | ||
| Low-Voltage Reset Threshold Voltage | VLVR | 1.4 | 1.48 | 1.56 | ℃ | TA = 105 ℃ | 368 |
| AVDD Supply Voltage (BOD) | AVDD | 0 | 3.6 | V | 368 | ||
| Brown-out Voltage (falling edge) | VBOD_F | 2.9 | 3 | 3.1 | V | BODVL [2:0] = 111 | 368 |
| Brown-out Voltage (falling edge) | VBOD_F | 2.7 | 2.8 | 2.9 | V | BODVL [2:0] = 110 | 368 |
| Brown-out Voltage (falling edge) | VBOD_F | 2.5 | 2.6 | 2.7 | V | BODVL [2:0] = 101 | 368 |
| Brown-out Voltage (falling edge) | VBOD_F | 2.3 | 2.4 | 2.5 | V | BODVL [2:0] = 100 | 368 |
| Brown-out Voltage (falling edge) | VBOD_F | 2.1 | 2.2 | 2.3 | V | BODVL [2:0] = 011 | 368 |
| Brown-out Voltage (falling edge) | VBOD_F | 1.9 | 2 | 2.1 | V | BODVL [2:0] = 010 | 368 |
| Brown-out Voltage (falling edge) | VBOD_F | 1.7 | 1.8 | 1.9 | V | BODVL [2:0] = 001 | 368 |
| Brown-out Voltage (falling edge) | VBOD_F | 1.5 | 1.6 | 1.7 | V | BODVL [2:0] = 000 | 368 |
CAD (KiCad official)
- Symbol:
M482KIDAE - Footprint:
Package_QFP:LQFP-128_14x14mm_P0.4mm - 3D model: LQFP-128(14x14) (KiCad packages3D, STEP)
- 3D model files:
m482kidae-etched.step/m482kidae-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m482kidae.step/m482kidae.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nuvoton Tech datasheet (401 pp, sha256
26fcd9069806e542, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).