component
M451RG6AE
Public Made by Adomby adom
Nuvoton Tech Microcontroller Units (MCUs/MPUs/SOCs), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownM451RG6AE
Nuvoton Tech · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(10x10)
M451RG6AE from Nuvoton Tech, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB.15 | bidirectional | General purpose digital I/O pin, also EADC_CH12 analog input, ACMP0_P3 comparator positive input and EBI_nCS1 chip select 1. |
| 2 | PB.5 | bidirectional | General purpose digital I/O pin, also EADC_CH13, SPI0_MOSI0, SPI1_MOSI, ACMP0_P2 and EBI_AD6. |
| 3 | PB.6 | bidirectional | General purpose digital I/O pin, also EADC_CH14, SPI0_MISO0, SPI1_MISO, ACMP0_P1 and EBI_AD5. |
| 4 | PB.7 | bidirectional | General purpose digital I/O pin, also EADC_CH15, SPI0_CLK, SPI1_CLK, ACMP0_P0 and EBI_AD4. |
| 5 | nRESET | input | External reset input, active LOW, with an internal pull-up; setting this pin low resets the chip to initial state. |
| 6 | PD.0 | bidirectional | General purpose digital I/O pin, also SPI1_I2SMCLK, UART0_RXD, ACMP1_N and INT3. |
| 7 | AVSS | power_in | Ground pin for analog circuit. |
| 8 | PD.8 | bidirectional | General purpose digital I/O pin, also EBI_nCS0 chip select 0. |
| 9 | PD.9 | bidirectional | General purpose digital I/O pin, also ACMP1_P3 and EBI_ALE address latch enable. |
| 10 | PD.1 | bidirectional | General purpose digital I/O pin, also PWM0_SYNC_IN, UART0_TXD, ACMP1_P2, T0 and EBI_nRD. |
| 11 | PD.2 | bidirectional | General purpose digital I/O pin, also STADC, T0_EXT, ACMP1_P1, PWM0_BRAKE0, EBI_nWR and INT0. |
| 12 | PD.3 | bidirectional | General purpose digital I/O pin, also T2, T1_EXT, ACMP1_P0, PWM0_BRAKE1, EBI_MCLK and INT1. |
| 13 | VBAT | power_in | Power supply by batteries for RTC and PF.0~PF.2. |
| 14 | PF.0 | bidirectional | General purpose digital I/O pin, also X32_OUT 32.768 kHz crystal output and INT5. |
| 15 | PF.1 | bidirectional | General purpose digital I/O pin, also X32_IN 32.768 kHz crystal input. |
| 16 | PF.2 | bidirectional | General purpose digital I/O pin, also TAMPER detector loop pin. |
| 17 | PD.12 | bidirectional | General purpose digital I/O pin, also SPI2_SS, UART3_TXD, PWM1_CH0 and EBI_ADR16. |
| 18 | PD.13 | bidirectional | General purpose digital I/O pin, also SPI2_MOSI, UART3_RXD, PWM1_CH1 and EBI_ADR17. |
| 19 | PD.14 | bidirectional | General purpose digital I/O pin, also SPI2_MISO, UART3_nCTS, PWM1_CH2 and EBI_ADR18. |
| 20 | PD.15 | bidirectional | General purpose digital I/O pin, also SPI2_CLK, UART3_nRTS, PWM1_CH3 and EBI_ADR19. |
| 21 | PD.7 | bidirectional | General purpose digital I/O pin, also PWM0_SYNC_IN, T1, ACMP0_O, PWM0_CH5 and EBI_nRD. |
| 22 | PF.3 | bidirectional | General purpose digital I/O pin, also XT1_OUT 4~20 MHz crystal output and I2C1_SCL. |
| 23 | PF.4 | bidirectional | General purpose digital I/O pin, also XT1_IN 4~20 MHz crystal input and I2C1_SDA. |
| 24 | VSS | power_in | Ground pin for digital circuit. |
| 25 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital function. |
| 26 | LDO_CAP | power_out | LDO output pin; must be connected with a 1uF capacitor. |
| 27 | PC.0 | bidirectional | General purpose digital I/O pin, also SPI2_CLK, UART2_nCTS, PWM0_CH0, EBI_AD8 and INT2. |
| 28 | PC.1 | bidirectional | General purpose digital I/O pin, also CLKO, STDAC, UART2_nRTS, PWM0_CH1 and EBI_AD9. |
| 29 | PC.2 | bidirectional | General purpose digital I/O pin, also SPI2_SS, UART2_TXD, ACMP1_O, PWM0_CH2 and EBI_AD10. |
| 30 | PC.3 | bidirectional | General purpose digital I/O pin, also SPI2_MOSI, UART2_RXD, PWM0_CH3 and EBI_AD11. |
| 31 | PC.4 | bidirectional | General purpose digital I/O pin, also SPI2_MISO, I2C1_SCL, PWM0_CH4 and EBI_AD12. |
| 32 | PE.0 | bidirectional | General purpose digital I/O pin, also SPI2_CLK, I2C1_SDA, T2_EXT, SC0_CD, PWM0_CH0, EBI_nCS1 and INT4. |
| 33 | PC.5 | bidirectional | General purpose digital I/O pin, also SPI2_I2SMCLK, PWM0_CH5 and EBI_AD13. |
| 34 | PC.6 | bidirectional | General purpose digital I/O pin, also I2C1_SMBAL, ACMP1_O, PWM1_CH0 and EBI_AD14. |
| 35 | PC.7 | bidirectional | General purpose digital I/O pin, also I2C1_SMBSUS, PWM1_CH1 and EBI_AD15. |
| 36 | PF.5 | bidirectional | General purpose digital I/O pin, also ICE_CLK serial wired debugger clock. |
| 37 | PF.6 | bidirectional | General purpose digital I/O pin, also ICE_DAT serial wired debugger data. |
| 38 | PA.7 | bidirectional | General purpose digital I/O pin, also SPI1_CLK, T0_EXT and EBI_AD7. |
| 39 | PA.6 | bidirectional | General purpose digital I/O pin, also SPI1_MISO, T1_EXT and EBI_AD6. |
| 40 | PA.5 | bidirectional | General purpose digital I/O pin, also SPI1_MOSI, T2_EXT and EBI_AD5. |
| 41 | PA.4 | bidirectional | General purpose digital I/O pin, also SPI1_SS and EBI_AD4. |
| 42 | PE.8 | bidirectional | General purpose digital I/O pin (VDDIO domain), also UART1_TXD, SPI0_MISO1, I2C1_SCL and SC0_PWR. |
| 43 | PE.9 | bidirectional | General purpose digital I/O pin (VDDIO domain), also UART1_RXD, SPI0_MOSI1, I2C1_SDA and SC0_RST. |
| 44 | PE.10 | bidirectional | General purpose digital I/O pin (VDDIO domain), also SPI1_MISO, SPI0_MISO0, UART1_nCTS, I2C0_SMBAL and SC0_DAT. |
| 45 | PE.11 | bidirectional | General purpose digital I/O pin (VDDIO domain), also SPI1_MOSI, SPI0_MOSI0, UART1_nRTS, I2C0_SMBSUS and SC0_CLK. |
| 46 | PE.12 | bidirectional | General purpose digital I/O pin (VDDIO domain), also SPI1_SS, SPI0_SS, UART1_TXD and I2C0_SCL. |
| 47 | PE.13 | bidirectional | General purpose digital I/O pin (VDDIO domain), also SPI1_CLK, SPI0_CLK, UART1_RXD and I2C0_SDA. |
| 48 | VDDIO | power_in | Power supply for PE.8~PE.13. |
| 49 | PA.3 | bidirectional | General purpose digital I/O pin, also UART0_RXD, UART0_nRTS, I2C0_SCL, SC0_PWR, PWM1_CH2 and EBI_AD3. |
| 50 | PA.2 | bidirectional | General purpose digital I/O pin, also UART0_TXD, UART0_nCTS, I2C0_SDA, SC0_RST, PWM1_CH3 and EBI_AD2. |
| 51 | PA.1 | bidirectional | General purpose digital I/O pin, also UART1_nRTS, UART1_RXD, SC0_DAT, PWM1_CH4 and EBI_AD1. |
| 52 | PA.0 | bidirectional | General purpose digital I/O pin, also UART1_nCTS, UART1_TXD, SC0_CLK, PWM1_CH5, EBI_AD0 and INT0. |
| 53 | VSS | power_in | Ground pin for digital circuit. |
| 54 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital function. |
| 55 | AVDD | power_in | Power supply for internal analog circuit. |
| 56 | VREF | power_in | Voltage reference input for ADC; must be connected with a 1uF capacitor. |
| 57 | PB.0 | bidirectional | General purpose digital I/O pin, also EADC_CH0, SPI0_MOSI1, UART2_RXD, T2, DAC analog output, EBI_nWRL and INT1. |
| 58 | PB.1 | bidirectional | General purpose digital I/O pin, also EADC_CH1, SPI0_MISO1, UART2_TXD, T3, SC0_RST, PWM0_SYNC_OUT and EBI_nWRH. |
| 59 | PB.2 | bidirectional | General purpose digital I/O pin, also EADC_CH2, SPI0_CLK, SPI1_CLK, UART1_RXD and SC0_CD. |
| 60 | PB.3 | bidirectional | General purpose digital I/O pin, also EADC_CH3, SPI0_MISO0, SPI1_MISO and UART1_TXD. |
| 61 | PB.4 | bidirectional | General purpose digital I/O pin, also EADC_CH4, SPI0_SS, SPI1_SS, UART1_nCTS, ACMP0_N and EBI_AD7. |
| 62 | PB.8 | bidirectional | General purpose digital I/O pin, also EADC_CH5, UART1_nRTS and PWM0_CH2. |
| 63 | PB.11 | bidirectional | General purpose digital I/O pin, also EADC_CH8 analog input. |
| 64 | PB.12 | bidirectional | General purpose digital I/O pin, also EADC_CH9 analog input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Power Supply | VDD - VSS | -0.3 | 7 | V | 212 | ||
| Oscillator Frequency | 1/tCLCL | 4 | 20 | MHz | 212 | ||
| Operating Temperature | TA | -40 | 105 | °C | 212 | ||
| Storage Temperature | TST | -55 | 150 | °C | 212 | ||
| Maximum Current into VDD | IDD | 120 | mA | 212 | |||
| Maximum Current out of VSS | ISS | 120 | mA | 212 | |||
| Maximum Current sunk by a I/O pin | IIO | 35 | mA | 212 | |||
| Maximum Current sourced by a I/O pin | IIO | 35 | mA | 212 | |||
| Maximum Current sunk by total I/O pins | IIO | 100 | mA | 212 | |||
| Maximum Current sourced by total I/O pins | IIO | 100 | mA | 212 | |||
| Operation voltage | VDD | 2.5 | 5.5 | V | VDD = 2.5 V ~ 5.5 V up to 72 MHz | 213 | |
| Power supply for PE.8~PE.13 | VDDIO | 1.8 | 5.5 | V | 213 | ||
| RTC Operation voltage for PF.0~PF.2 | VBAT | 2.5 | 5.5 | V | 213 | ||
| Power Ground | VSS / AVSS | -0.3 | 0 | 0.3 | V | 213 | |
| LDO Output Voltage | VLDO | 1.8 | V | VDD ≥ 2.5 V | 213 | ||
| Band-gap Voltage | VBG | 1.175 | 1.21 | 1.225 | V | VDD = 2.5 V ~ 5.5 V, TA = 25C | 213 |
| Allowed voltage difference for VDD and AVDD | VDD-AVDD | -0.3 | 0 | 0.3 | V | 213 | |
| Operating Current Normal Run, HCLK = 72 MHz, all digital modules on | IDD1 | 64 | mA | 5.5V, HXT 12 MHz, HIRC X, PLL V, digital modules V | 213 | ||
| Operating Current Normal Run, HCLK = 72 MHz | IDD3 | 63 | mA | 3.3V, HXT 12 MHz, PLL V, digital modules V | 213 | ||
| Operating Current Idle Mode, HCLK = 72 MHz | IIDLE1 | 42 | mA | 5.5V, HXT 12 MHz, PLL V, digital modules V | 214 | ||
| Operating Current HCLK = 32.768 kHz | IDD21 | 153 | uA | 5.5V, LXT 32.768 kHz, digital modules V | 214 | ||
| Operating Current Idle Mode, HCLK = 12 MHz | IIDLE14 | 2 | mA | 5.5V, HXT 12 MHz, digital modules X | 214 | ||
| Sink current | ISK24 | 5.4 | 9 | mA | VDD = VBAT = 2.5 ~ 5.5 V, VDDIO = 1.8 V, VS = 0.45 V | 218 | |
| HXT Operation Voltage | VHXT | 2.5 | 5.5 | V | 219 | ||
| HXT Temperature | TA | -40 | 105 | ℃ | 219 | ||
| HXT Operating Current | IHXT | 2 | mA | 12 MHz, VDD = 5.5V | 219 | ||
| HXT Clock Frequency | fHXT | 4 | 20 | MHz | 219 | ||
| HXT input clock high time | tCHCX | 10 | ns | 219 | |||
| HXT input clock low time | tCLCX | 10 | ns | 219 | |||
| HXT input clock rise time | tCLCH | 2 | 15 | ns | 219 | ||
| HXT input clock fall time | tCHCL | 2 | 15 | ns | 219 | ||
| HXT input clock Input High Voltage | VIH | 0.7 | 1 | V | 0.7VDD to VDD (as printed, in multiples of VDD) | 219 | |
| HXT input clock Input Low Voltage | VIL | 0 | 0.3 | V | 0 to 0.3VDD (as printed, in multiples of VDD) | 219 | |
| HIRC Supply Voltage | VHRC | 1.62 | 1.8 | 1.98 | V | 220 | |
| HIRC Center Frequency | fHRC | 22.1184 | MHz | 220 | |||
| HIRC Calibrated Oscillator Frequency accuracy | fHRC | -1 | 1 | % | TA = 25 ℃, VDD = 5 V | 220 | |
| HIRC Calibrated Oscillator Frequency accuracy | fHRC | -2 | 2 | % | TA = -40 ~ 105, VDD = 2.5 V ~ 5.5 V | 220 | |
| HIRC Operating Current | IHRC | 790 | μA | TA = 25 ℃, VDD = 5 V | 220 | ||
| LIRC Supply Voltage | VLRC | 2.5 | 5.5 | V | 222 | ||
| LIRC Center Frequency | fLRC | 10 | kHz | 222 | |||
| LIRC Oscillator Frequency accuracy | fLRC | -30 | 30 | % | VDD = 2.5 V ~ 5.5 V, TA = 25 | 222 | |
| LIRC Oscillator Frequency accuracy | fLRC | -50 | 50 | % | VDD = 2.5 V ~ 5.5 V, TA = -40 ~ +105 | 222 | |
| ADC Resolution | 12 | Bit | 223 | ||||
| ADC Differential Nonlinearity Error | DNL | -2 | 2 | LSB | 223 | ||
| ADC Integral Nonlinearity Error | INL | -2 | 2 | LSB | 223 | ||
| ADC Offset Error | EO | 3 | LSB | 223 | |||
| ADC Gain Error | EG | -3 | LSB | 223 | |||
| ADC Absolute Error | EA | 4 | LSB | 223 | |||
| ADC Clock Frequency | FADC | 21 | MHz | AVDD = 4.5~5.5 V | 223 | ||
| ADC Clock Frequency | FADC | 8.4 | MHz | AVDD = 2.5~5.5 V | 223 | ||
| ADC Sample Rate | FS | 1000 | kSPS | AVDD = 4.5~5.5 V, TCONV = 21 clock, FADC = 21 Mhz | 223 | ||
| ADC Sample Rate | FS | 400 | kSPS | AVDD = 2.5~5.5 V, TCONV = 21 clock, FADC = 8.4 Mhz | 223 | ||
| ADC Supply Voltage | AVDD | 2.5 | 5.5 | V | 223 | ||
| ADC Supply Current (Avg.) | IDDA | 2.8 | mA | AVDD = 5 V | 223 | ||
| ADC Analog Input Voltage | VIN | 0 | V | max printed as VREF | 223 | ||
| ADC Reference Voltage | VREF | 2.5 | V | AVDD = 5 V; max printed as AVDD | 223 | ||
| ADC Input Capacitance | CIN | 6 | pF | 223 | |||
| ADC Input Load | RIN | 6.5 | kΩ | 223 | |||
| DAC Analog Supply Current | IDDA | 350 | uA | AVDD = 5.5V, buffer ON | 228 | ||
| DAC Reference Supply Current | IREF | 260 | uA | VREF = 5.5V | 228 | ||
| DAC Settling Time | TSTAB | 4 | 8 | us | Transition between the lowest and the highest input codes when VO reaches final value ±1 LSB | 228 | |
| DAC Update Rate | FS | 1 | MSPS | Transition between adjacent codes | 228 | ||
| DAC Wake-up Time | TWAKEUP | 10 | us | 228 | |||
| Internal Voltage Reference supply | VVREF | 2.5 | 5.5 | V | AVDD | 228 | |
| Vref(2.56V) | Vref1 | 2.483 | 2.56 | 2.637 | V | AVDD >= 2.9V | 228 |
| Vref(2.048V) | Vref2 | 1.986 | 2.048 | 2.109 | V | AVDD >= 2.5V | 228 |
| Vref(3.072V) | Vref3 | 2.98 | 3.072 | 3.164 | V | AVDD >= 3.4V | 228 |
| Vref(4.096V) | Vref4 | 3.973 | 4.096 | 4.219 | V | AVDD >= 4.5V | 228 |
| USB Input High (driven) | VIH | 2 | V | 228 | |||
| USB Input Low | VIL | 0.8 | V | 228 | |||
| USB Differential Input Sensitivity | VDI | 0.2 | V | /PADP-PADM/ | 228 | ||
| USB Differential Common-mode Range | VCM | 0.8 | 2.5 | V | Includes VDI range | 228 | |
| USB Single-ended Receiver Threshold | VSE | 0.8 | 2 | V | 228 | ||
| USB Receiver Hysteresis | 200 | mV | 228 | ||||
| USB Output Low (driven) | VOL | 0 | 0.3 | V | 228 | ||
| USB Output High (driven) | VOH | 2.8 | 3.6 | V | 228 | ||
| USB Output Signal Cross Voltage | VCRS | 1.3 | 2 | V | 228 | ||
| USB Pull-up Resistor | RPU | 1.425 | 1.575 | kΩ | 228 | ||
| USB Driver Output Resistance | ZDRV | 10 | Ω | Steady state drive* | 228 | ||
| USB Transceiver Capacitance | CIN | 20 | pF | Pin to GND | 228 | ||
| USB Rise Time | TFR | 4 | 20 | ns | CL=50p | 229 | |
| USB Fall Time | TFF | 4 | 20 | ns | CL=50p | 229 | |
| USB Rise and Fall Time Matching | TFRFF | 90 | 111.11 | % | TFRFF=TFR/TFF | 229 | |
| VBUS Pin Input Voltage | VBUS | 4 | 5 | 5.5 | V | 229 | |
| USB LDO Output Voltage | VDD33 | 3.3 | V | 229 | |||
| USB LDO External Bypass Capacitor | Cbp | 1 | uF | 229 | |||
| Flash Supply Voltage | VFLA | 1.8 | V | TA = 25 | 230 | ||
| Flash Endurance | NENDUR | 20000 | cycles | TA = 25 | 230 | ||
| Flash Data Retention | TRET | 100 | year | TA = 25 | 230 | ||
| Flash Read Current | IDD1 | 13.5 | mA | TA = 25 | 230 |
CAD (KiCad official)
- Symbol:
M451RG6AE - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
m451rg6ae-etched.step/m451rg6ae-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m451rg6ae.step/m451rg6ae.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nuvoton Tech datasheet (242 pp, sha256
d2e54dfa7e24891a, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).