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M41ST85WMX6TR

STMicroelectronics · Real Time Clocks · SOIC-28-300mil

M41ST85WMX6TR from STMicroelectronics, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NF passive No function pin that should be tied to VSS and is internally shorted to pins 2, 3 and 4.
2 NF passive No function pin that should be tied to VSS and is internally shorted to pins 1, 3 and 4.
3 NF passive No function pin that should be tied to VSS and is internally shorted to pins 1, 2 and 4.
4 NF passive No function pin that should be tied to VSS and is internally shorted to pins 1, 2 and 3.
5 NC unconnected No connect.
6 NC unconnected No connect.
7 NC unconnected No connect.
8 SQW output Programmable square wave output from 1 Hz to 32.768 kHz, enabled by the SQWE bit; CMOS output with VOH 2.4 V min at IOH = -1.0 mA.
9 WDI input Watchdog input that resets the watchdog timer on a high-to-low or low-to-high transition; internally pulled down to VSS through 100 kΩ and tied to VSS if unused.
10 RSTIN1 input Active-low reset input 1 that generates an output reset on RST; internally pulled up to VCC through 100 kΩ, pulses shorter than 50 ns are ignored.
11 RSTIN2 input Active-low reset input 2 that generates an output reset on RST; internally pulled up to VCC through 100 kΩ, pulses shorter than 20 ms are ignored.
12 PFO output Power-fail output that goes low when PFI is below the 1.25 V threshold and during battery backup; left unconnected if unused.
13 NC unconnected No connect.
14 VSS power_in Ground.
15 VBAT power_in Backup battery supply input, 2.5 to 3.5 V (3.0 V typ), for the embedded-crystal SOIC only.
16 ECON output Conditioned chip enable output that write-protects external LPSRAM by going high (within 0.2 V of VBAT) when VCC is out of tolerance.
17 SDA bidirectional I2C serial data input/output, requiring a pull-up resistor to a positive supply.
18 NC unconnected No connect.
19 RST output Active-low open-drain reset output driven by power-fail detect, RSTIN1/RSTIN2 and watchdog; needs a pull-up resistor, up to 3.6 V.
20 NC unconnected No connect.
21 NC unconnected No connect.
22 SCL input I2C serial clock input, up to 400 kHz, requiring a pull-up resistor to a positive supply.
23 PFI input Power-fail input compared to the 1.25 V internal reference (threshold 1.225 to 1.275 V); connected to VSS if unused.
24 NC unconnected No connect.
25 VOUT power_out Supply output to external SRAM, supplying up to 100 mA from VCC or 100 µA in battery backup.
26 IRQ/FT/OUT output Open-drain interrupt, frequency test (512 Hz) and output-driver pin for alarm and watchdog; needs a pull-up resistor (500 Ω to 10 kΩ recommended), VOL 0.4 V at 10 mA.
27 EX input External chip enable input, propagated to ECON with a 15 ns max delay.
28 VCC power_in Supply voltage, 2.7 to 3.6 V (absolute maximum 4.6 V).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-28-300mil
Category Clock/Timing
Pins 28

CAD (KiCad official)

  • Symbol: M41ST85WMX6TR
  • Footprint: Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm
  • 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
  • 3D model files: m41st85wmx6tr-etched.step / m41st85wmx6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); m41st85wmx6tr.step / m41st85wmx6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (43 pp, sha256 3cc1487654fb8698, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF