component
M41ST85WMX6TR
Public Made by Adomby adom
STMicroelectronics Real Time Clocks, SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+64@@ -0,0 +1,64 @@+# M41ST85WMX6TR++**STMicroelectronics** · Real Time Clocks · SOIC-28-300mil++M41ST85WMX6TR from STMicroelectronics, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NF | passive | No function pin that should be tied to VSS and is internally shorted to pins 2, 3 and 4. |+| 2 | NF | passive | No function pin that should be tied to VSS and is internally shorted to pins 1, 3 and 4. |+| 3 | NF | passive | No function pin that should be tied to VSS and is internally shorted to pins 1, 2 and 4. |+| 4 | NF | passive | No function pin that should be tied to VSS and is internally shorted to pins 1, 2 and 3. |+| 5 | NC | unconnected | No connect. |+| 6 | NC | unconnected | No connect. |+| 7 | NC | unconnected | No connect. |+| 8 | SQW | output | Programmable square wave output from 1 Hz to 32.768 kHz, enabled by the SQWE bit; CMOS output with VOH 2.4 V min at IOH = -1.0 mA. |+| 9 | WDI | input | Watchdog input that resets the watchdog timer on a high-to-low or low-to-high transition; internally pulled down to VSS through 100 kΩ and tied to VSS if unused. |+| 10 | RSTIN1 | input | Active-low reset input 1 that generates an output reset on RST; internally pulled up to VCC through 100 kΩ, pulses shorter than 50 ns are ignored. |+| 11 | RSTIN2 | input | Active-low reset input 2 that generates an output reset on RST; internally pulled up to VCC through 100 kΩ, pulses shorter than 20 ms are ignored. |+| 12 | PFO | output | Power-fail output that goes low when PFI is below the 1.25 V threshold and during battery backup; left unconnected if unused. |+| 13 | NC | unconnected | No connect. |+| 14 | VSS | power_in | Ground. |+| 15 | VBAT | power_in | Backup battery supply input, 2.5 to 3.5 V (3.0 V typ), for the embedded-crystal SOIC only. |+| 16 | ECON | output | Conditioned chip enable output that write-protects external LPSRAM by going high (within 0.2 V of VBAT) when VCC is out of tolerance. |+| 17 | SDA | bidirectional | I2C serial data input/output, requiring a pull-up resistor to a positive supply. |+| 18 | NC | unconnected | No connect. |+| 19 | RST | output | Active-low open-drain reset output driven by power-fail detect, RSTIN1/RSTIN2 and watchdog; needs a pull-up resistor, up to 3.6 V. |+| 20 | NC | unconnected | No connect. |+| 21 | NC | unconnected | No connect. |+| 22 | SCL | input | I2C serial clock input, up to 400 kHz, requiring a pull-up resistor to a positive supply. |+| 23 | PFI | input | Power-fail input compared to the 1.25 V internal reference (threshold 1.225 to 1.275 V); connected to VSS if unused. |+| 24 | NC | unconnected | No connect. |+| 25 | VOUT | power_out | Supply output to external SRAM, supplying up to 100 mA from VCC or 100 µA in battery backup. |+| 26 | IRQ/FT/OUT | output | Open-drain interrupt, frequency test (512 Hz) and output-driver pin for alarm and watchdog; needs a pull-up resistor (500 Ω to 10 kΩ recommended), VOL 0.4 V at 10 mA. |+| 27 | EX | input | External chip enable input, propagated to ECON with a 15 ns max delay. |+| 28 | VCC | power_in | Supply voltage, 2.7 to 3.6 V (absolute maximum 4.6 V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-28-300mil |+| Category | Clock/Timing |+| Pins | 28 |++## CAD (KiCad official)++- Symbol: `M41ST85WMX6TR`+- Footprint: `Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm`+- 3D model: SOIC-28-300mil (KiCad packages3D, STEP)+- 3D model files: `m41st85wmx6tr-etched.step` / `m41st85wmx6tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m41st85wmx6tr.step` / `m41st85wmx6tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589040739070185472) (43 pp, sha256 `3cc1487654fb8698`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/m41st85wmx6tr-datasheet.pdf)
page.jsonadded+321@@ -0,0 +1,321 @@+{+ "slug": "m41st85wmx6tr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Real Time Clocks, SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "clock-timing",+ "m41st85wmx6tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "m41st85wmx6tr.kicad_sym",+ "m41st85wmx6tr.kicad_mod",+ "m41st85wmx6tr.glb",+ "m41st85wmx6tr.step",+ "m41st85wmx6tr.lbr",+ "docs/hero.png",+ "docs/m41st85wmx6tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "m41st85wmx6tr-hero.glb",+ "m41st85wmx6tr-hero.overlay.json"+ ],+ "component": {+ "mpn": "M41ST85WMX6TR",+ "manufacturer": "STMicroelectronics",+ "package": "SOIC-28-300mil",+ "pin_count": 28,+ "category": "Clock/Timing",+ "subcategory": "Real Time Clocks",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589040739070185472",+ "parts": {+ "symbol": "m41st85wmx6tr.kicad_sym",+ "footprint": "m41st85wmx6tr.kicad_mod",+ "model_3d": "m41st85wmx6tr-hero.glb",+ "model_3d_plain": "m41st85wmx6tr.glb",+ "model_3d_step": "m41st85wmx6tr-etched.step",+ "model_3d_step_plain": "m41st85wmx6tr.step",+ "lbr": "m41st85wmx6tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2651507",+ "digikey": "497-13794-2-ND",+ "mouser": "511-M41ST85WMX6TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T03:06:13Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-13794-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-M41ST85WMX6TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "NF",+ "type": "passive",+ "description": "No function pin that should be tied to VSS and is internally shorted to pins 2, 3 and 4."+ },+ {+ "number": "2",+ "name": "NF",+ "type": "passive",+ "description": "No function pin that should be tied to VSS and is internally shorted to pins 1, 3 and 4."+ },+ {+ "number": "3",+ "name": "NF",+ "type": "passive",+ "description": "No function pin that should be tied to VSS and is internally shorted to pins 1, 2 and 4."+ },+ {+ "number": "4",+ "name": "NF",+ "type": "passive",+ "description": "No function pin that should be tied to VSS and is internally shorted to pins 1, 2 and 3."+ },+ {+ "number": "5",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect."+ },+ {+ "number": "6",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect."+ },+ {+ "number": "7",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect."+ },+ {+ "number": "8",+ "name": "SQW",+ "type": "output",+ "description": "Programmable square wave output from 1 Hz to 32.768 kHz, enabled by the SQWE bit; CMOS output with VOH 2.4 V min at IOH = -1.0 mA."+ },+ {+ "number": "9",+ "name": "WDI",+ "type": "input",+ "description": "Watchdog input that resets the watchdog timer on a high-to-low or low-to-high transition; internally pulled down to VSS through 100 kΩ and tied to VSS if unused."+ },+ {+ "number": "10",+ "name": "RSTIN1",+ "type": "input",+ "description": "Active-low reset input 1 that generates an output reset on RST; internally pulled up to VCC through 100 kΩ, pulses shorter than 50 ns are ignored."+ },+ {+ "number": "11",+ "name": "RSTIN2",+ "type": "input",+ "description": "Active-low reset input 2 that generates an output reset on RST; internally pulled up to VCC through 100 kΩ, pulses shorter than 20 ms are ignored."+ },+ {+ "number": "12",+ "name": "PFO",+ "type": "output",+ "description": "Power-fail output that goes low when PFI is below the 1.25 V threshold and during battery backup; left unconnected if unused."+ },+ {+ "number": "13",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect."+ },+ {+ "number": "14",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "15",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup battery supply input, 2.5 to 3.5 V (3.0 V typ), for the embedded-crystal SOIC only."+ },+ {+ "number": "16",+ "name": "ECON",+ "type": "output",+ "description": "Conditioned chip enable output that write-protects external LPSRAM by going high (within 0.2 V of VBAT) when VCC is out of tolerance."+ },+ {+ "number": "17",+ "name": "SDA",+ "type": "bidirectional",+ "description": "I2C serial data input/output, requiring a pull-up resistor to a positive supply."+ },+ {+ "number": "18",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect."+ },+ {+ "number": "19",+ "name": "RST",+ "type": "output",+ "description": "Active-low open-drain reset output driven by power-fail detect, RSTIN1/RSTIN2 and watchdog; needs a pull-up resistor, up to 3.6 V."+ },+ {+ "number": "20",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect."+ },+ {+ "number": "21",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect."+ },+ {+ "number": "22",+ "name": "SCL",+ "type": "input",+ "description": "I2C serial clock input, up to 400 kHz, requiring a pull-up resistor to a positive supply."+ },+ {+ "number": "23",+ "name": "PFI",+ "type": "input",+ "description": "Power-fail input compared to the 1.25 V internal reference (threshold 1.225 to 1.275 V); connected to VSS if unused."+ },+ {+ "number": "24",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect."+ },+ {+ "number": "25",+ "name": "VOUT",+ "type": "power_out",+ "description": "Supply output to external SRAM, supplying up to 100 mA from VCC or 100 µA in battery backup."+ },+ {+ "number": "26",+ "name": "IRQ/FT/OUT",+ "type": "output",+ "description": "Open-drain interrupt, frequency test (512 Hz) and output-driver pin for alarm and watchdog; needs a pull-up resistor (500 Ω to 10 kΩ recommended), VOL 0.4 V at 10 mA."+ },+ {+ "number": "27",+ "name": "EX",+ "type": "input",+ "description": "External chip enable input, propagated to ECON with a 15 ns max delay."+ },+ {+ "number": "28",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage, 2.7 to 3.6 V (absolute maximum 4.6 V)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin types for NF (tied to VSS per note) and NC pins chosen by judgment; datasheet gives no electrica; The datasheet's Figure 3 (28-pin 300 mil SOIC) is used for SOX28 since it is the only variant with V",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 43,+ "cost_usd": 0.9913,+ "at": "2026-10-08T03:05:54"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589040739070185472",+ "pages": 43,+ "sha256": "3cc1487654fb8698",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 28,+ "described": 28,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "m41st85wmx6tr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 17.9,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b889a13dbe9ec59e79fa9f1b5118b00bfa54f9582392335ff3365b64afc264b1",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "m41st85wmx6tr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 17.9,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "64e3e45eaebc809391b82137f5dc249632de6c9c8f6cfc4b810280b25ba91490",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}