# M251LD2AE

**Nuvoton Tech** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

M251LD2AE from Nuvoton Tech, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB.5 | bidirectional | General-purpose digital I/O PB.5; the datasheet lists alternate functions EADC0_CH5, ACMP1_N, I2C0_SCL, USCI1_CTL0, SC0_CLK, PWM0_CH0, UART2_TXD, TM0 and INT0. |
| 2 | PB.4 | bidirectional | General-purpose digital I/O PB.4; the datasheet lists alternate functions EADC0_CH4, ACMP1_P1, I2C0_SDA, USCI1_CTL1, SC0_DAT, PWM0_CH1, UART2_RXD, TM1 and INT1. |
| 3 | PB.3 | bidirectional | General-purpose digital I/O PB.3; the datasheet lists alternate functions EADC0_CH3, ACMP0_N, I2C1_SCL, UART1_TXD, USCI1_DAT1, SC0_RST, PWM0_CH2, PWM0_BRAKE0, TM2 and INT2. |
| 4 | PB.2 | bidirectional | General-purpose digital I/O PB.2; the datasheet lists alternate functions EADC0_CH2, ACMP0_P1, I2C1_SDA, UART1_RXD, USCI1_DAT0, SC0_PWR, PWM0_CH3, TM3 and INT3. |
| 5 | PB.1 | bidirectional | General-purpose digital I/O PB.1; the datasheet lists alternate functions EADC0_CH1, UART2_TXD, USCI1_CLK, I2C1_SCL, QSPI0_MISO1, PWM0_CH4, PWM1_CH4 and PWM0_BRAKE0. |
| 6 | PB.0 | bidirectional | General-purpose digital I/O PB.0; the datasheet lists alternate functions EADC0_CH0, UART2_RXD, SPI0_I2SMCLK, I2C1_SDA, QSPI0_MOSI1, PWM0_CH5, PWM1_CH5 and PWM0_BRAKE1. |
| 7 | PA.11 | bidirectional | General-purpose digital I/O PA.11; the datasheet lists alternate functions ACMP0_P0, USCI0_CLK, BPWM0_CH0 and TM0_EXT. |
| 8 | PA.10 | bidirectional | General-purpose digital I/O PA.10; the datasheet lists alternate functions ACMP1_P0, USCI0_DAT0, BPWM0_CH1 and TM1_EXT. |
| 9 | PA.9 | bidirectional | General-purpose digital I/O PA.9; the datasheet lists alternate functions USCI0_DAT1, UART1_TXD, BPWM0_CH2 and TM2_EXT. |
| 10 | PA.8 | bidirectional | General-purpose digital I/O PA.8; the datasheet lists alternate functions USCI0_CTL1, UART1_RXD, BPWM0_CH3, TM3_EXT and INT4. |
| 11 | PF.5 | bidirectional | General-purpose digital I/O PF.5; the datasheet lists alternate functions UART2_RXD, UART2_nCTS, PWM0_CH0, BPWM0_CH4, X32_IN and EADC0_ST (external trigger input). |
| 12 | PF.4 | bidirectional | General-purpose digital I/O PF.4; the datasheet lists alternate functions UART2_TXD, UART2_nRTS, PWM0_CH1, BPWM0_CH5 and X32_OUT. |
| 13 | PF.3 | bidirectional | General-purpose digital I/O PF.3; the datasheet lists alternate functions UART0_TXD, I2C0_SCL, XT1_IN and BPWM1_CH0. |
| 14 | PF.2 | bidirectional | General-purpose digital I/O PF.2; the datasheet lists alternate functions UART0_RXD, I2C0_SDA, QSPI0_CLK, XT1_OUT and BPWM1_CH1. |
| 15 | PA.7 | bidirectional | General-purpose digital I/O PA.7; the datasheet lists alternate functions UART0_TXD, I2C1_SCL, PWM1_CH4, BPWM1_CH2, ACMP0_WLAT, TM2 and INT1. |
| 16 | PA.6 | bidirectional | General-purpose digital I/O PA.6; the datasheet lists alternate functions UART0_RXD, I2C1_SDA, PWM1_CH5, BPWM1_CH3, ACMP1_WLAT, TM3 and INT0. |
| 17 | PA.5 | bidirectional | General-purpose digital I/O PA.5; the datasheet lists alternate functions QSPI0_MISO1, UART0_nCTS, UART0_TXD, I2C0_SCL, BPWM0_CH5 and PWM0_CH0. |
| 18 | PA.4 | bidirectional | General-purpose digital I/O PA.4; the datasheet lists alternate functions QSPI0_MOSI1, SPI0_I2SMCLK, SC0_nCD, UART0_nRTS, UART0_RXD, I2C0_SDA, BPWM0_CH4 and PWM0_CH1. |
| 19 | PA.3 | bidirectional | General-purpose digital I/O PA.3; the datasheet lists alternate functions QSPI0_SS, SPI0_SS, SC0_PWR, I2C0_SMBAL, UART1_TXD, I2C1_SCL, BPWM0_CH3, PWM0_CH2, CLKO and PWM1_BRAKE1. |
| 20 | PA.2 | bidirectional | General-purpose digital I/O PA.2; the datasheet lists alternate functions QSPI0_CLK, SPI0_CLK, SC0_RST, I2C0_SMBSUS, UART1_RXD, I2C1_SDA, BPWM0_CH2 and PWM0_CH3. |
| 21 | PA.1 | bidirectional | General-purpose digital I/O PA.1; the datasheet lists alternate functions QSPI0_MISO0, SPI0_MISO, SC0_DAT, UART0_TXD, UART1_nCTS, BPWM0_CH1 and PWM0_CH4. |
| 22 | PA.0 | bidirectional | General-purpose digital I/O PA.0; the datasheet lists alternate functions QSPI0_MOSI0, SPI0_MOSI, SC0_CLK, UART0_RXD, UART1_nRTS, BPWM0_CH0 and PWM0_CH5. |
| 23 | VDDIO | power_in | Power supply for PA.0~PA.5 (the datasheet gives no voltage limits in this section). |
| 24 | nRESET | input | External reset input, active LOW, with an internal pull-up; driving it low resets the chip to its initial state, and the datasheet recommends a 10 kΩ pull-up resistor and 10 uF capacitor on this pin. |
| 25 | PF.0 | bidirectional | General-purpose digital I/O PF.0 also used as ICE_DAT (serial wired debugger data); the datasheet recommends a 100 kΩ pull-up resistor on ICE_DAT, and other alternate functions are UART1_TXD, I2C1_SCL, UART0_TXD and BPWM1_CH0. |
| 26 | PF.1 | bidirectional | General-purpose digital I/O PF.1 also used as ICE_CLK (serial wired debugger clock); the datasheet recommends a 100 kΩ pull-up resistor on ICE_CLK, and other alternate functions are UART1_RXD, I2C1_SDA, UART0_RXD and BPWM1_CH1. |
| 27 | PC.5 | bidirectional | General-purpose digital I/O PC.5; the datasheet lists alternate functions QSPI0_MISO1, UART2_TXD, I2C1_SCL, PWM1_CH0 and PSIO0_CH0. |
| 28 | PC.4 | bidirectional | General-purpose digital I/O PC.4; the datasheet lists alternate functions QSPI0_MOSI1, UART2_RXD, I2C1_SDA, PWM1_CH1 and PSIO0_CH1. |
| 29 | PC.3 | bidirectional | General-purpose digital I/O PC.3; the datasheet lists alternate functions QSPI0_SS, UART2_nRTS, I2C0_SMBAL, PWM1_CH2 and PSIO0_CH2. |
| 30 | PC.2 | bidirectional | General-purpose digital I/O PC.2; the datasheet lists alternate functions QSPI0_CLK, UART2_nCTS, I2C0_SMBSUS, PWM1_CH3 and PSIO0_CH3. |
| 31 | PC.1 | bidirectional | General-purpose digital I/O PC.1; the datasheet lists alternate functions QSPI0_MISO0, UART2_TXD, I2C0_SCL, PWM1_CH4 and ACMP0_O. |
| 32 | PC.0 | bidirectional | General-purpose digital I/O PC.0; the datasheet lists alternate functions QSPI0_MOSI0, UART2_RXD, I2C0_SDA, PWM1_CH5 and ACMP1_O. |
| 33 | PA.12 | bidirectional | General-purpose digital I/O PA.12; the datasheet lists alternate functions I2C1_SCL and BPWM1_CH2. |
| 34 | PA.13 | bidirectional | General-purpose digital I/O PA.13; the datasheet lists alternate functions I2C1_SDA and BPWM1_CH3. |
| 35 | PA.14 | bidirectional | General-purpose digital I/O PA.14; the datasheet lists alternate functions UART0_TXD and BPWM1_CH4. |
| 36 | PA.15 | bidirectional | General-purpose digital I/O PA.15; the datasheet lists alternate functions UART0_RXD and BPWM1_CH5. |
| 37 | VSS | power_in | Ground pin for digital circuit. |
| 38 | LDO_CAP | power_out | LDO output pin; the datasheet requires a 1 uF capacitor connected to this pin. |
| 39 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital circuit. |
| 40 | PC.14 | bidirectional | General-purpose digital I/O PC.14; the datasheet lists alternate functions SPI0_I2SMCLK, USCI0_CTL0, QSPI0_CLK and TM1. |
| 41 | PB.15 | bidirectional | General-purpose digital I/O PB.15; the datasheet lists alternate functions EADC0_CH15, SPI0_SS, USCI0_CTL1, UART0_nCTS, PSIO0_CH0, PWM1_CH0, TM0_EXT and PWM0_BRAKE1. |
| 42 | PB.14 | bidirectional | General-purpose digital I/O PB.14; the datasheet lists alternate functions EADC0_CH14, SPI0_CLK, USCI0_DAT1, UART0_nRTS, PSIO0_CH1, PWM1_CH1, TM1_EXT and CLKO. |
| 43 | PB.13 | bidirectional | General-purpose digital I/O PB.13; the datasheet lists alternate functions EADC0_CH13, ACMP0_P3, ACMP1_P3, SPI0_MISO, USCI0_DAT0, UART0_TXD, PSIO0_CH2, PWM1_CH2 and TM2_EXT. |
| 44 | PB.12 | bidirectional | General-purpose digital I/O PB.12; the datasheet lists alternate functions EADC0_CH12, ACMP0_P2, ACMP1_P2, SPI0_MOSI, USCI0_CLK, UART0_RXD, PSIO0_CH3, PWM1_CH3 and TM3_EXT. |
| 45 | AVDD | power_in | Power supply for internal analog circuit. |
| 46 | AVSS | power_in | Ground pin for analog circuit. |
| 47 | PB.7 | bidirectional | General-purpose digital I/O PB.7; the datasheet lists alternate functions EADC0_CH7, USCI1_DAT0, UART1_TXD, BPWM1_CH4, PWM1_BRAKE0, PWM1_CH4, INT5 and ACMP0_O. |
| 48 | PB.6 | bidirectional | General-purpose digital I/O PB.6; the datasheet lists alternate functions EADC0_CH6, USCI1_DAT1, UART1_RXD, BPWM1_CH5, PWM1_BRAKE1, PWM1_CH5, INT4 and ACMP1_O. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC power supply | VDD-VSS | -0.3 |  | 6.5 | V |  | 197 |
| VDDIO Power Supply | VDDIO-VSS | -0.3 |  | 6.5 | V |  | 197 |
| VBAT Power Supply | VBAT-VSS | -0.3 |  | 6.5 | V |  | 197 |
| Variations between different VDD power pins | ΔVDD |  |  | 50 | mV |  | 197 |
| Allowed voltage difference for VDD and AVDD | /VDD -AVDD/ |  |  | 50 | mV |  | 197 |
| Variations between different ground pins | ΔVSS |  |  | 50 | mV |  | 197 |
| Allowed voltage difference for VSS and AVSS | /VSS - AVSS/ |  |  | 50 | mV |  | 197 |
| Input voltage on any other pin | VIN |  |  | 6.5 | V |  | 197 |
| Maximum current into VDD | ΣIDD |  |  | 200 | mA |  | 198 |
| Maximum current into VDDIO / IBAT | IDDIO / IBAT |  |  | 100 | mA |  | 198 |
| Maximum current out of VSS | ΣISS |  |  | 100 | mA |  | 198 |
| Maximum current sunk by a I/O Pin | IIO |  |  | 20 | mA |  | 198 |
| Maximum current sourced by a I/O Pin | IIO |  |  | 20 | mA |  | 198 |
| Maximum current sunk by total I/O Pins |  |  |  | 100 | mA |  | 198 |
| Maximum current sourced by total I/O Pins |  |  |  | 100 | mA |  | 198 |
| Maximum injected current by a I/O Pin | IINJ(PIN) | -5 |  | 5 | mA |  | 198 |
| Maximum injected current by total I/O Pins | ΣIINJ(PIN) | -25 |  | 25 | mA |  | 198 |
| Operating junction temperature | TJ | -40 |  | 125 | ℃ |  | 199 |
| Storage temperature | TST | -65 |  | 150 | ℃ |  | 199 |
| Electrostatic discharge, human body mode | VHBM | -6000 |  | 6000 | V |  | 200 |
| Electrostatic discharge, charge device model | VCDM | -1000 |  | 1000 | V |  | 200 |
| Pin current for latch-up | LU | -150 |  | 150 | mA | Class I | 200 |
| Fast transient voltage burst | VEFT | -4.4 |  | 4.4 | kV |  | 200 |
| Temperature | TA | -40 |  | 105 | ℃ |  | 204 |
| Internal AHB clock frequency | fHCLK |  |  | 48 | MHz |  | 204 |
| Operation voltage | VDD | 1.75 |  | 5.5 | V |  | 204 |
| VDDIO Operation voltage | VDDIO | 1.65 |  | 5.5 | V |  | 204 |
| VBAT Operation voltage | VBAT | 1.75 |  | 5.5 | V |  | 204 |
| Analog reference voltage | VREF | 1.75 |  |  | V |  | 204 |
| Band-gap voltage | VBG | 795 | 815 | 840 | mV |  | 204 |
| Operating current, normal run mode, 48 MHz, all peripherals disable (HIRC/PLL/HXT) | IDD_RUN |  | 5.4 | 6.45 | mA | PL0 (PLSEL = 00), executed from Flash; HCLK HIRC, PLL or HXT; typ at TA = 25 °C; max at TA = 105 °C | 205 |
| Operating current, normal run mode, 48 MHz, all peripherals enable (HIRC/PLL/HXT) | IDD_RUN |  | 15 | 17 | mA | PL0 (PLSEL = 00), executed from Flash, all peripherals enable; HCLK HIRC, PLL or HXT; typ at TA = 25 °C; max at TA = 105 °C | 205 |
| Operating current, normal run mode, 38.4 kHz, all peripherals enable (LIRC/LXT) | IDD_RUN |  | 0.01 | 0.16 | mA | PL3 (PLSEL = 11), executed from Flash, all peripherals disable; HCLK LIRC or LXT; typ at TA = 25 °C; max at TA = 105 °C | 205 |
| Operating current, idle mode, 48 MHz, all peripherals disable (HIRC/PLL/HXT) | IDD_IDLE |  | 2.25 | 3 | mA | PL0 (PLSEL = 00), all peripherals disable; HCLK HIRC, PLL or HXT; typ at TA = 25 °C; max at TA = 105 °C | 206 |
| Operating current, idle mode, 48 MHz, all peripherals enable (HIRC/PLL/HXT) | IDD_IDLE |  | 12 | 13.7 | mA | PL0 (PLSEL = 00), all peripherals enable; HCLK HIRC, PLL or HXT; typ at TA = 25 °C; max at TA = 105 °C | 206 |
| Deep Power-down mode current, all peripherals disable | IDD_DPD |  | 1.45 | 76 | µA | Deep Power-down mode, all peripherals disable; max at TA = 105 °C | 207 |
| Power-down mode current, all peripherals disable | IDD_PD |  | 1.7 | 128 | µA | Power-down mode, all peripherals disable; max at TA = 105 °C | 207 |
| Fast wake up Power-down mode current, all peripherals disable | IDD_FWPD |  | 100 | 292 | µA | Fast wake up Power-down mode, all peripherals disable; max at TA = 105 °C | 207 |
| Pull up resistor | RPU | 45 | 52 | 57 | kΩ |  | 213 |
| Pull down resistor | RPD | 45 | 52 | 57 | kΩ |  | 213 |
| Input leakage current | ILK | -1 |  | 1 | µA | VSS < VIN < VDD, Open-drain or input only mode | 213 |
| Source current for push-pull mode and high level | ISR | -5 | -8 | -10.5 | mA | VDD = 4.5 V, VIN=(VDD-0.4) V | 214 |
| Sink current for push-pull mode and low level | ISK | 13 | 20 | 27 | mA | VDD = 4.5 V, VIN= 0.4 V | 214 |
| Internal nRESET pull up resistor | RRST | 45 | 53 | 47 | kΩ |  | 215 |
| Oscillator frequency, 48 MHz HIRC | fHRC | 47.52 | 48 | 48.48 | MHz | TA = 25 °C, VDD = 3.3V | 216 |
| Operating current, 48 MHz HIRC | IHRC |  | 500 | 800 | µA |  | 216 |
| Oscillator frequency, 4 MHz MIRC | FMRC | 3.951 | 4.032 | 4.112 | MHz | TA = 25 °C, VDD = 3.3V | 217 |
| Operating current, 4 MHz MIRC | IMRC |  |  | 30 | µA |  | 217 |
| Operating current, 38.4 kHz LIRC | ILRC |  | 0.85 | 1.3 | µA | VDD = 3.3V | 218 |
| Oscillator frequency, external HXT crystal/resonator | fHXT | 4 |  | 32 | MHz |  | 219 |
| Temperature range, external 32.768 kHz LXT | TLXT | -40 |  | 105 | ℃ |  | 223 |
| InRush current on voltage regulator power-on (POR or wakeup from Standby) | IRUSH |  | 60 | 150 | mA |  | 204 |
| ESR of CLDO output capacitor | RESR |  |  | 0.5 | Ω |  | 204 |
| InRush energy on voltage regulator power-on (POR or wakeup from Standby) | ERUSH |  | 0.9 |  | µC |  | 204 |
| LDO output voltage | VLDO |  | 1.5 |  | V |  | 204 |
| LDO output capacitor on each pin | CLDO |  | 1 |  | µF |  | 204 |
| Thermal resistance junction-ambient, 48-pin LQFP(7x7 mm) | θJA |  | 60 |  | ℃/Watt |  | 199 |

## CAD (KiCad official)

- Symbol: `M251LD2AE`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `m251ld2ae-etched.step` / `m251ld2ae-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m251ld2ae.step` / `m251ld2ae.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nuvoton Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590207682197159936) (263 pp, sha256 `c4af3258cc70fcc5`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/m251ld2ae-datasheet.pdf)