# M24C64

**STMicroelectronics** · 64 Kbit I2C EEPROM · SO-8

A 64 Kbit (8 KB) serial EEPROM with an I2C interface, in SO-8, ST's take on the ubiquitous 24-series EEPROM and a staple for storing settings, calibration, and small logs that survive power loss. It talks I2C at up to 1 MHz, writes in 32-byte pages, and rates over a million write/erase cycles with 200-year retention. Three chip-address pins (E0-E2) put up to eight on one bus, and a write-control pin (WC) hardware-protects the array against stray writes. It shares its pinout and command set with the 24LC64/AT24C64. Runs 1.7-5.5 V.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Chip enable address input bit 0. Tied to VCC or VSS to set b1 of the 7-bit I2C device select code. Left floating reads as 0. |
| 2 | E1 | input | Chip enable address input bit 1. Tied to VCC or VSS to set b2 of the 7-bit I2C device select code. Left floating reads as 0. |
| 3 | E2 | input | Chip enable address input bit 2. Tied to VCC or VSS to set b3 of the 7-bit I2C device select code. Left floating reads as 0. |
| 4 | VSS | power_in | Ground reference for all signals, including VCC supply voltage. |
| 5 | SDA | bidirectional | I2C serial data. Open-drain bidirectional line for address, data and acknowledge transfers. Requires an external pull-up resistor to VCC. |
| 6 | SCL | input | I2C serial clock input. Strobes data in on SDA and clocks data out on SDA. Supports 100 kHz, 400 kHz, and 1 MHz bus speeds. |
| 7 | WC | input | Write control, active low. When driven high, all write operations to the memory array are disabled (device ACKs the device-select and address bytes but not data bytes). Low or floating enables writes. |
| 8 | VCC | power_in | Supply voltage. 1.7 V to 5.5 V for M24C64-F/DF (down to 1.6 V under restricting conditions), 1.8 V to 5.5 V for M24C64-R, 2.5 V to 5.5 V for M24C64-W. Recommend 10 nF to 100 nF decoupling to VSS close to the pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Type | Serial EEPROM (non-volatile) |
| Density | 64 Kbit (8 KB) |
| Interface | I2C up to 1 MHz |
| Write | 32-byte page |
| Endurance | 1,000,000+ cycles |
| Retention | >200 years |
| Addressing | E0-E2 (8 per bus) + WC protect |
| Supply voltage | 1.7-5.5 V |
| Package | SO-8 |

## Ordering variants

Same part, different packaging or reel option.

- `M24C64-DFMN6TP (SO-8)`
- `M24C64-RMN6TP (SO-8)`

## CAD (KiCad official)

- Symbol: `M24C64 (generated from datasheet; KiCad has no symbol)`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D)
- 3D model files: `m24c64-etched.step` / `m24c64-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m24c64.step` / `m24c64.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/m24c64-df.pdf) (50 pp, sha256 `c95123bad692fd89`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/m24c64-datasheet.pdf)