component

M24256-BWMN6TP

Public Made by Adom

by adom

STMicroelectronics EEPROM, SOIC-8-150mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs m24256-bwmn6tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
m24256-bwmn6tp-etched.fit.json m24256-bwmn6tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
m24256-bwmn6tp-etched.glb m24256-bwmn6tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
m24256-bwmn6tp-etched.step m24256-bwmn6tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
m24256-bwmn6tp.glb Publish 0.1.0 · Ray 1mo ago
m24256-bwmn6tp.kicad_mod Publish 0.1.0 · Ray 1mo ago
m24256-bwmn6tp.kicad_sym Publish 0.1.0 · Ray 1mo ago
m24256-bwmn6tp.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
m24256-bwmn6tp.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 7d ago
README.md m24256-bwmn6tp: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago

M24256-BWMN6TP

STMicroelectronics · EEPROM · SOIC-8-150mil

M24256-BWMN6TP from STMicroelectronics, in a SOIC-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 E0 input Chip Enable address input bit b1 of the 7-bit I2C device select code. Must be tied to VCC or VSS (floating reads as 0). Sets one of eight device addresses on a shared bus.
2 E1 input Chip Enable address input bit b2 of the 7-bit I2C device select code. Must be tied to VCC or VSS (floating reads as 0).
3 E2 input Chip Enable address input bit b3 of the 7-bit I2C device select code. Must be tied to VCC or VSS (floating reads as 0).
4 VSS power_in Ground reference for VCC supply voltage.
5 SDA bidirectional I2C Serial Data input/output. Open-drain output, requires an external pull-up resistor to VCC. Transfers data in and out of the EEPROM synchronized with SCL.
6 SCL input I2C Serial Clock input. Strobes data available on SDA(in) and clocks out data on SDA(out). Supports up to 1 MHz on the -BW variant.
7 WC input Write Control (active low). When driven high, write operations to the entire memory array are inhibited (device select and address bytes are still acknowledged, data bytes are not). Driven low or left floating enables writes.
8 VCC power_in Supply voltage. On the -BW variant: 2.5 V to 5.5 V. Decouple with a 10 nF to 100 nF capacitor to VSS close to the package pins.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8-150mil
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • M24256-BWMN6TP
  • M24256-BWMN6TPDW6TP
  • M24256-BWMN6TPDW6
  • M24256-BWMN6TPMC6TP
  • M24256-BWMN6TPMC6
  • M24256-BWMN6TPCS6

CAD (KiCad official)

  • Symbol: M24256-BWMN6TP
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-150mil (KiCad packages3D, STEP)
  • 3D model files: m24256-bwmn6tp-etched.step / m24256-bwmn6tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); m24256-bwmn6tp.step / m24256-bwmn6tp.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
m24256-bwmn6tp.step 122 KB You want the bare part, or you mark your own boards.
m24256-bwmn6tp-etched.step 2.6 MB You want the part with M24256-BWMN6TP already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 639 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (43 pp, sha256 3667ff5a4600a5b5, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF