component
M24128-DRDW3TP
Public Made by Adomby adom
STMicroelectronics Pre-ordered Chips, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownM24128-DRDW3TP
STMicroelectronics · Pre-ordered Chips · TSSOP-8
M24128-DRDW3TP from STMicroelectronics, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Chip Enable input that sets the least significant bit (b1) of the 7-bit device select code and must be tied to VCC or VSS; reads as low (0) if left floating. |
| 2 | E1 | input | Chip Enable input that sets bit b2 of the 7-bit device select code and must be tied to VCC or VSS; reads as low (0) if left floating. |
| 3 | E2 | input | Chip Enable input that sets bit b3 of the 7-bit device select code and must be tied to VCC or VSS; reads as low (0) if left floating. |
| 4 | VSS | power_in | Ground, the reference for the VCC supply voltage. |
| 5 | SDA | bidirectional | Serial data input/output with an open-drain output that may be wire-OR'ed on the bus and requires a pull-up resistor to VCC. |
| 6 | SCL | input | Serial clock input used to strobe data on SDA in and to output data on SDA out. |
| 7 | WC | input | Write Control input that disables writes to the entire memory array when driven high and enables writes when driven low or left floating. |
| 8 | VCC | power_in | Supply voltage pin, operating range 1.7 V to 5.5 V, to be decoupled with about 10 nF to 100 nF close to the VCC/VSS pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient operating temperature | -40 | 130 | °C | 25 | |||
| Storage temperature | TSTG | -65 | 150 | °C | 25 | ||
| Input or output range | VIO | -0.5 | 6.5 | V | 25 | ||
| DC output current | IOL | 5 | mA | SDA = 0 | 25 | ||
| Supply voltage | VCC | -0.5 | 6.5 | V | 25 | ||
| Electrostatic pulse (Human Body model) | VESD | 4000 | V | Human Body model, AEC-Q100-002 | 25 | ||
| Supply voltage (voltage range R) | VCC | 1.7 | 5.5 | V | Voltage range R | 26 | |
| Ambient operating temperature (grade 3) | TA | -40 | 125 | °C | 26 | ||
| Input impedance (E2, E1, E0, WC) | ZL | 30 | kΩ | VIN < 0.3 VCC | 27 | ||
| Input impedance (E2, E1, E0, WC) | ZH | 500 | kΩ | VIN > 0.7 VCC | 27 | ||
| Input leakage current (SCL, SDA, E2, E1, E0) | ILI | -2 | 2 | µA | VIN = VSS or VCC, device in Standby mode | 28 | |
| Output leakage current | ILO | -2 | 2 | µA | SDA in Hi-Z, external voltage applied on SDA: VSS or VCC | 28 | |
| Supply current (Read) | ICC | 2 | mA | fC = 400 kHz, VCC = 5.5 V | 28 | ||
| Supply current (Read) | ICC | 1 | mA | fC = 400 kHz, VCC = 1.7 V | 28 | ||
| Supply current (Write) | ICC0 | 2 | mA | During tW | 28 | ||
| Standby supply current | ICC1 | 1 | µA | Device not selected, t° = 85 °C, VIN = VSS or VCC, VCC = 1.7 V | 28 | ||
| Standby supply current | ICC1 | 2 | µA | Device not selected, t° = 85 °C, VIN = VSS or VCC, VCC = 2.5 V | 28 | ||
| Standby supply current | ICC1 | 3 | µA | Device not selected, t° = 85 °C, VIN = VSS or VCC, VCC = 5.5 V | 28 | ||
| Standby supply current | ICC1 | 15 | µA | Device not selected, t° = 125 °C, VIN = VSS or VCC, VCC = 1.7 V | 28 | ||
| Standby supply current | ICC1 | 20 | µA | Device not selected, t° = 125 °C, VIN = VSS or VCC, VCC = 5.5 V | 28 | ||
| Input low voltage (SCL, SDA, WC) | VIL | -0.45 | V | Max printed as 0.3 VCC | 28 | ||
| Input high voltage (SCL, SDA) | VIH | 6.5 | V | Min printed as 0.7 VCC | 28 | ||
| Output low voltage | VOL | 0.4 | V | IOL = 2.1 mA, VCC = 2.5 V or IOL = 3 mA, VCC = 5.5 V | 28 | ||
| Output low voltage | VOL | 0.3 | V | IOL = 1 mA, VCC = 1.7 V | 28 | ||
| Internal reset threshold voltage | VRES | 0.5 | 1.5 | V | Characterized only, not 100% tested | 28 | |
| Clock frequency (400 kHz) | fC | 400 | kHz | 29 | |||
| Clock pulse width high (400 kHz) | tCHCL | 600 | ns | 29 | |||
| Clock pulse width low (400 kHz) | tCLCH | 1300 | ns | 29 | |||
| SDA (out) fall time (400 kHz) | tQL1QL2 | 20 | 120 | ns | CL = 10 pF | 29 | |
| Data in setup time (400 kHz) | tDXCX | 100 | ns | 29 | |||
| Data in hold time (400 kHz) | tCLDX | 0 | ns | 29 | |||
| Data out hold time (400 kHz) | tDH | 100 | ns | 29 | |||
| Clock low to next data valid, access time (400 kHz) | tAA | 900 | ns | 29 | |||
| Start condition setup time (400 kHz) | tSU:STA | 600 | ns | 29 | |||
| Start condition hold time (400 kHz) | tHD:STA | 600 | ns | 29 | |||
| Stop condition setup time (400 kHz) | tSU:STO | 600 | ns | 29 | |||
| Time between Stop and next Start (400 kHz) | tBUF | 1300 | ns | 29 | |||
| WC set up time (before the Start condition) (400 kHz) | tSU:WC | 0 | µs | WC = 0 set up time to enable WRITE command | 29 | ||
| WC hold time (after the Stop condition) (400 kHz) | tHD:WC | 1 | µs | WC = 0 hold time to enable WRITE command | 29 | ||
| Write time | tW | 4 | ms | 29 | |||
| Pulse width ignored (input filter on SCL and SDA) | tNS | 80 | ns | Single glitch | 29 | ||
| Clock frequency (1 MHz) | fC | 0 | 1 | MHz | 30 | ||
| Clock pulse width high (1 MHz) | tCHCL | 260 | ns | 30 | |||
| Clock pulse width low (1 MHz) | tCLCH | 400 | ns | 30 | |||
| SDA (out) fall time (1 MHz) | tQL1QL2 | 120 | ns | 30 | |||
| Data in setup time (1 MHz) | tDXCX | 50 | ns | 30 | |||
| Data in hold time (1 MHz) | tCLDX | 0 | ns | 30 | |||
| Data out hold time (1 MHz) | tDH | 100 | ns | 30 | |||
| Clock low to next data valid, access time (1 MHz) | tAA | 450 | ns | 30 | |||
| Start condition setup time (1 MHz) | tSU:STA | 250 | ns | 30 | |||
| Start condition hold time (1 MHz) | tHD:STA | 250 | ns | 30 | |||
| Stop condition setup time (1 MHz) | tSU:STO | 250 | ns | 30 | |||
| Time between Stop and next Start (1 MHz) | tBUF | 500 | ns | 30 | |||
| Write time (1 MHz) | tW | 4 | ms | 30 | |||
| Pulse width ignored (input filter on SCL and SDA) (1 MHz) | tNS | 80 | ns | 30 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | TLEAD Lead temperature during soldering see note (1) 1. Compliant with JEDEC Standard J-STD-020D (for small body, Sn-Pb or Pb-free assembly), the ST | 25 |
CAD (KiCad official)
- Symbol:
M24128-DRDW3TP - Footprint:
Package_SO:TSSOP-8_4.4x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
m24128-drdw3tp-etched.step/m24128-drdw3tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m24128-drdw3tp.step/m24128-drdw3tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (41 pp, sha256
df6f33fbdd59f9a6, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).