component
M031LD2AE
Public Made by Adomby adom
Nuvoton Tech Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
M031LD2AE
Nuvoton Tech · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
M031LD2AE from Nuvoton Tech, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB.5 | bidirectional | GPIO port B pin 5 with multi-function alternates ADC0_CH5, ACMP1_N, I2C0_SCL, PWM0_CH0, UART2_TXD, TM0 and INT0. |
| 2 | PB.4 | bidirectional | GPIO port B pin 4 with multi-function alternates ADC0_CH4, ACMP1_P1, I2C0_SDA, PWM0_CH1, UART2_RXD, TM1 and INT1. |
| 3 | PB.3 | bidirectional | GPIO port B pin 3 with multi-function alternates ADC0_CH3, ACMP0_N, I2C1_SCL, UART1_TXD, PWM0_CH2, PWM0_BRAKE0, TM2 and INT2. |
| 4 | PB.2 | bidirectional | GPIO port B pin 2 with multi-function alternates ADC0_CH2, ACMP0_P1, I2C1_SDA, UART1_RXD, PWM0_CH3, TM3 and INT3. |
| 5 | PB.1 | bidirectional | GPIO port B pin 1 with multi-function alternates ADC0_CH1, UART2_TXD, I2C1_SCL, PWM0_CH4, PWM1_CH4 and PWM0_BRAKE0. |
| 6 | PB.0 | bidirectional | GPIO port B pin 0 with multi-function alternates ADC0_CH0, UART2_RXD, SPI0_I2SMCLK, I2C1_SDA, PWM0_CH5, PWM1_CH5 and PWM0_BRAKE1. |
| 7 | PA.11 | bidirectional | GPIO port A pin 11 with multi-function alternates ACMP0_P0, USCI0_CLK and TM0_EXT. |
| 8 | PA.10 | bidirectional | GPIO port A pin 10 with multi-function alternates ACMP1_P0, USCI0_DAT0 and TM1_EXT. |
| 9 | PA.9 | bidirectional | GPIO port A pin 9 with multi-function alternates USCI0_DAT1, UART1_TXD and TM2_EXT. |
| 10 | PA.8 | bidirectional | GPIO port A pin 8 with multi-function alternates USCI0_CTL1, UART1_RXD, TM3_EXT and INT4. |
| 11 | PF.5 | bidirectional | GPIO port F pin 5 with multi-function alternates UART2_RXD, UART2_nCTS, PWM0_CH0, X32_IN (32 kHz crystal input) and ADC0_ST. |
| 12 | PF.4 | bidirectional | GPIO port F pin 4 with multi-function alternates UART2_TXD, UART2_nRTS, PWM0_CH1 and X32_OUT (32 kHz crystal output). |
| 13 | PF.3 | bidirectional | GPIO port F pin 3 with multi-function alternates UART0_TXD, I2C0_SCL and XT1_IN (external crystal input). |
| 14 | PF.2 | bidirectional | GPIO port F pin 2 with multi-function alternates UART0_RXD, I2C0_SDA and XT1_OUT (external crystal output). |
| 15 | PA.7 | bidirectional | GPIO port A pin 7 with multi-function alternates UART0_TXD, I2C1_SCL, PWM1_CH4, ACMP0_WLAT, TM2 and INT1. |
| 16 | PA.6 | bidirectional | GPIO port A pin 6 with multi-function alternates UART0_RXD, I2C1_SDA, PWM1_CH5, ACMP1_WLAT, TM3 and INT0. |
| 17 | PA.5 | bidirectional | GPIO port A pin 5 with multi-function alternates UART0_nCTS, UART0_TXD, I2C0_SCL and PWM0_CH0. |
| 18 | PA.4 | bidirectional | GPIO port A pin 4 with multi-function alternates SPI0_I2SMCLK, UART0_nRTS, UART0_RXD, I2C0_SDA and PWM0_CH1. |
| 19 | PA.3 | bidirectional | GPIO port A pin 3 with multi-function alternates SPI0_SS, UART1_TXD, I2C1_SCL, PWM0_CH2, CLKO and PWM1_BRAKE1. |
| 20 | PA.2 | bidirectional | GPIO port A pin 2 with multi-function alternates SPI0_CLK, UART1_RXD, I2C1_SDA and PWM0_CH3. |
| 21 | PA.1 | bidirectional | GPIO port A pin 1 with multi-function alternates SPI0_MISO, UART0_TXD, UART1_nCTS and PWM0_CH4. |
| 22 | PA.0 | bidirectional | GPIO port A pin 0 with multi-function alternates SPI0_MOSI, UART0_RXD, UART1_nRTS and PWM0_CH5. |
| 23 | PF.15 | bidirectional | GPIO port F pin 15 with multi-function alternates PWM0_BRAKE0, PWM0_CH1, TM2, CLKO and INT4. |
| 24 | nRESET | input | External active-low reset input for the MCU. |
| 25 | PF.0 | bidirectional | GPIO port F pin 0 with multi-function alternates UART1_TXD, I2C1_SCL, UART0_TXD and ICE_DAT (ICE data). |
| 26 | PF.1 | bidirectional | GPIO port F pin 1 with multi-function alternates UART1_RXD, I2C1_SDA, UART0_RXD and ICE_CLK (ICE clock). |
| 27 | PC.5 | bidirectional | GPIO port C pin 5 with multi-function alternates UART2_TXD, I2C1_SCL and PWM1_CH0. |
| 28 | PC.4 | bidirectional | GPIO port C pin 4 with multi-function alternates UART2_RXD, I2C1_SDA and PWM1_CH1. |
| 29 | PC.3 | bidirectional | GPIO port C pin 3 with multi-function alternates UART2_nRTS and PWM1_CH2. |
| 30 | PC.2 | bidirectional | GPIO port C pin 2 with multi-function alternates UART2_nCTS and PWM1_CH3. |
| 31 | PC.1 | bidirectional | GPIO port C pin 1 with multi-function alternates UART2_TXD, I2C0_SCL, PWM1_CH4 and ACMP0_O. |
| 32 | PC.0 | bidirectional | GPIO port C pin 0 with multi-function alternates UART2_RXD, I2C0_SDA, PWM1_CH5 and ACMP1_O. |
| 33 | PA.12 | bidirectional | GPIO port A pin 12 with multi-function alternate I2C1_SCL. |
| 34 | PA.13 | bidirectional | GPIO port A pin 13 with multi-function alternate I2C1_SDA. |
| 35 | PA.14 | bidirectional | GPIO port A pin 14 with multi-function alternate UART0_TXD. |
| 36 | PA.15 | bidirectional | GPIO port A pin 15 with multi-function alternate UART0_RXD. |
| 37 | VSS | power_in | Ground reference for the digital core and I/O. |
| 38 | LDO_CAP | power_out | Internal LDO output pin that requires an external capacitor; the capacitor value is not given in this excerpt. |
| 39 | VDD | power_in | Digital supply input for the MCU. |
| 40 | PC.14 | bidirectional | GPIO port C pin 14 with multi-function alternates SPI0_I2SMCLK, USCI0_CTL0 and TM1. |
| 41 | PB.15 | bidirectional | GPIO port B pin 15 with multi-function alternates ADC0_CH15, SPI0_SS, USCI0_CTL1, UART0_nCTS, PWM1_CH0, TM0_EXT and PWM0_BRAKE1. |
| 42 | PB.14 | bidirectional | GPIO port B pin 14 with multi-function alternates ADC0_CH14, SPI0_CLK, USCI0_DAT1, UART0_nRTS, PWM1_CH1, TM1_EXT and CLKO. |
| 43 | PB.13 | bidirectional | GPIO port B pin 13 with multi-function alternates ADC0_CH13, ACMP0_P3, ACMP1_P3, SPI0_MISO, USCI0_DAT0, UART0_TXD, PWM1_CH2 and TM2_EXT. |
| 44 | PB.12 | bidirectional | GPIO port B pin 12 with multi-function alternates ADC0_CH12, ACMP0_P2, ACMP1_P2, SPI0_MOSI, USCI0_CLK, UART0_RXD, PWM1_CH3 and TM3_EXT. |
| 45 | AVDD | power_in | Analog supply input for the ADC and analog peripherals. |
| 46 | AVSS | power_in | Analog ground for the ADC and analog peripherals. |
| 47 | PB.7 | bidirectional | GPIO port B pin 7 with multi-function alternates ADC0_CH7, UART1_TXD, PWM1_BRAKE0, PWM1_CH4, INT5 and ACMP0_O. |
| 48 | PB.6 | bidirectional | GPIO port B pin 6 with multi-function alternates ADC0_CH6, UART1_RXD, PWM1_BRAKE1, PWM1_CH5, INT4 and ACMP1_O. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC power supply (VDD-VSS) | VDD-VSS | -0.3 | 4 | V | 228 | ||
| Input voltage on 5V-tolerance I/O | VIN | 5.5 | V | 228 | |||
| Input voltage on any other pin | VIN | 4 | V | 228 | |||
| Maximum current into VDD | ΣIDD | 150 | mA | 228 | |||
| Maximum current out of VSS | ΣISS | 100 | mA | 228 | |||
| Maximum current sunk by a I/O pin | IIO | 20 | mA | 228 | |||
| Maximum current sourced by a I/O pin | IIO | 20 | mA | 228 | |||
| Maximum current sunk by total I/O pins | 100 | mA | 228 | ||||
| Maximum current sourced by total I/O pins | 100 | mA | 228 | ||||
| Maximum injected current by a I/O pin | IINJ(PIN) | -5 | 5 | mA | 228 | ||
| Maximum injected current by total I/O pins | ΣIINJ(PIN) | -25 | 25 | mA | 228 | ||
| Electrostatic discharge, human body mode | VHBM | -6000 | 6000 | V | ANSI/ESDA/JEDEC JS-001 (M03xB/C/D/E table) | 231 | |
| Electrostatic discharge, charge device model | VCDM | -1000 | 1000 | V | ANSI/ESDA/JEDEC JS-002 (M03xB/C/D/E table) | 231 | |
| Pin current for latch-up | LU | -400 | 400 | mA | JEDEC EIA/JESD78 | 231 | |
| Fast transient voltage burst | VEFT | -4.4 | 4.4 | kV | IEC 61000-4-4, class 4A | 231 | |
| Operating ambient temperature | TA | -40 | 105 | °C | 230 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 230 | ||
| Storage temperature | TST | -65 | 150 | °C | 230 | ||
| Operating ambient temperature (general operating conditions) | TA | -40 | 105 | °C | 234 | ||
| Internal AHB clock frequency | fHCLK | 48 | MHz | VDD = 1.8 V~3.6V | 234 | ||
| Internal AHB clock frequency | fHCLK | 72 | MHz | VDD = 2.0 V~3.6V | 234 | ||
| Operation voltage (fHCLK up to 48 MHz) | VDD | 1.8 | 3.6 | V | fHCLK up to 48 MHz | 234 | |
| Operation voltage (fHCLK up to 72 MHz) | VDD | 2 | 3.6 | V | fHCLK up to 72 MHz | 234 | |
| Analog reference voltage | VREF | 1.8 | V | AVDD − VREF < 1.2 V | 234 | ||
| Band-gap voltage | VBG | 1.16 | 1.23 | 1.31 | 234 | ||
| ESR of CLDO output capacitor | RESR | 0.1 | 10 | Ω | 234 | ||
| Input leakage current | ILK | -1 | 1 | A | VSS < VIN < VDD, Open-drain or input only mode | 244 | |
| Source current for quasi-bidirectional mode and high level | ISR | -25.5 | -28 | -31 | µA | VDD = 3.3 V, VIN=(VDD-0.4) V | 245 |
| Source current for quasi-bidirectional mode and high level | ISR | -19 | -22 | -24 | µA | VDD = 2.5 V, VIN=(VDD-0.4) V | 245 |
| Source current for quasi-bidirectional mode and high level | ISR | -10.5 | -13 | -16 | µA | VDD = 1.8 V, VIN=(VDD-0.4) V | 245 |
| Source current for push-pull mode and high level | ISR | -8 | -10 | -15 | mA | VDD = 3.3 V, VIN=(VDD-0.4) V | 245 |
| Source current for push-pull mode and high level | ISR | -6 | -8 | -13 | mA | VDD = 2.5 V, VIN=(VDD-0.4) V | 245 |
| Source current for push-pull mode and high level | ISR | -3.5 | -5.5 | -10.5 | mA | VDD = 1.8 V, VIN=(VDD-0.4) V | 245 |
| Sink current for push-pull mode and low level | ISK | 7.5 | 9 | 14.5 | mA | VDD = 3.3 V, VIN= 0.4 V | 245 |
| Sink current for push-pull mode and low level | ISK | 6 | 7.5 | 13 | mA | VDD = 2.5 V, VIN= 0.4 V | 245 |
| Sink current for push-pull mode and low level | ISK | 3.5 | 5 | 10.5 | mA | VDD = 1.8 V, VIN= 0.4 V | 245 |
| nRESET input filtered pulse time (power-down mode) | tFR | 75 | 155 | µs | Power down mode | 245 | |
| POR reset voltage | VPOR | 1.35 | 1.5 | 1.65 | V | 256 | |
| LVR reset voltage | VLVR | 1.6 | 1.7 | 1.8 | V | 256 | |
| BOD brown-out detect voltage | VBOD | 1.8 | 2 | 2.2 | V | BODVL = 0 | 256 |
| BOD brown-out detect voltage | VBOD | 2.3 | 2.5 | 2.7 | V | BODVL = 1 | 256 |
| Oscillator frequency (HIRC) | fHRC | 47.52 | 48 | 48.48 | MHz | TA = 25 °C, VDD = 3.3V | 246 |
| Frequency drift over temperature and voltage (HIRC) | -1 | 1 | % | TA = 25 °C, VDD = 3.3V | 246 | ||
| Frequency drift over temperature and voltage (HIRC) | -2 | 2 | % | TA = -40 °C ~ +105 °C, VDD = 1.8 ~ 3.6V | 246 | ||
| Oscillator frequency (LIRC) | FLRC | 38.016 | 38.4 | 38.784 | kHz | 248 | |
| Frequency drift over temperature and voltage (LIRC) | -1 | 1 | % | TA = 25 °C, VDD = 3.3V | 248 | ||
| Frequency drift over temperature and voltage (LIRC) | -15 | 15 | % | TA = -40 |
248 | ||
| Oscillator frequency (HXT crystal/resonator) | fHXT | 4 | 32 | MHz | 249 | ||
| PLL input clock | fPLL_in | 3.2 | 32 | MHz | 254 | ||
| PLL multiplier output clock | fPLL_OUT | 50 | 144 | MHz | 254 | ||
| PLL locking time | TL | 500 | µs | 254 | |||
| Program/erase endurance | NENDUR | 20000 | cycles | TJ = -40°C~125°C | 273 | ||
| Data retention | TRET | 65 | year | 20 kcycle, TJ = 55°C | 273 | ||
| Normal run mode, executed from Flash, all peripherals disable, 48 MHz | IDD_RUN | 8.5 | 10.8 | mA | Max at TA = 105 °C; typ at TA = 25 °C | 235 | |
| Normal run mode, executed from Flash, all peripherals enable, 48 MHz | IDD_RUN | 19.5 | 24.21 | mA | Max at TA = 105 °C; typ at TA = 25 °C | 235 | |
| Idle mode, all peripherals disable, 48 MHz | IDD_IDLE | 3.85 | 5.26 | mA | Max at TA = 105 °C; typ at TA = 25 °C | 236 | |
| Idle mode, all peripherals enable, 48 MHz | IDD_IDLE | 14.94 | 18.79 | mA | Max at TA = 105 °C; typ at TA = 25 °C | 236 | |
| Power-down mode, all peripherals disable | IDD_PD | 12 | 700 | µA | Max at TA = 105 °C; typ at TA = 25 °C | 237 | |
| Thermal resistance junction-ambient, 48-pin LQFP (7x7 mm) | θJA | 60 | °C/Watt | Determined according to JESD51-2 | 230 |
CAD (KiCad official)
- Symbol:
M031LD2AE - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
m031ld2ae-etched.step/m031ld2ae-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m031ld2ae.step/m031ld2ae.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nuvoton Tech datasheet (283 pp, sha256
1a8a8f8110d5e2e0, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# M031LD2AE
**Nuvoton Tech** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
M031LD2AE from Nuvoton Tech, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB.5 | bidirectional | GPIO port B pin 5 with multi-function alternates ADC0_CH5, ACMP1_N, I2C0_SCL, PWM0_CH0, UART2_TXD, TM0 and INT0. |
| 2 | PB.4 | bidirectional | GPIO port B pin 4 with multi-function alternates ADC0_CH4, ACMP1_P1, I2C0_SDA, PWM0_CH1, UART2_RXD, TM1 and INT1. |
| 3 | PB.3 | bidirectional | GPIO port B pin 3 with multi-function alternates ADC0_CH3, ACMP0_N, I2C1_SCL, UART1_TXD, PWM0_CH2, PWM0_BRAKE0, TM2 and INT2. |
| 4 | PB.2 | bidirectional | GPIO port B pin 2 with multi-function alternates ADC0_CH2, ACMP0_P1, I2C1_SDA, UART1_RXD, PWM0_CH3, TM3 and INT3. |
| 5 | PB.1 | bidirectional | GPIO port B pin 1 with multi-function alternates ADC0_CH1, UART2_TXD, I2C1_SCL, PWM0_CH4, PWM1_CH4 and PWM0_BRAKE0. |
| 6 | PB.0 | bidirectional | GPIO port B pin 0 with multi-function alternates ADC0_CH0, UART2_RXD, SPI0_I2SMCLK, I2C1_SDA, PWM0_CH5, PWM1_CH5 and PWM0_BRAKE1. |
| 7 | PA.11 | bidirectional | GPIO port A pin 11 with multi-function alternates ACMP0_P0, USCI0_CLK and TM0_EXT. |
| 8 | PA.10 | bidirectional | GPIO port A pin 10 with multi-function alternates ACMP1_P0, USCI0_DAT0 and TM1_EXT. |
| 9 | PA.9 | bidirectional | GPIO port A pin 9 with multi-function alternates USCI0_DAT1, UART1_TXD and TM2_EXT. |
| 10 | PA.8 | bidirectional | GPIO port A pin 8 with multi-function alternates USCI0_CTL1, UART1_RXD, TM3_EXT and INT4. |
| 11 | PF.5 | bidirectional | GPIO port F pin 5 with multi-function alternates UART2_RXD, UART2_nCTS, PWM0_CH0, X32_IN (32 kHz crystal input) and ADC0_ST. |
| 12 | PF.4 | bidirectional | GPIO port F pin 4 with multi-function alternates UART2_TXD, UART2_nRTS, PWM0_CH1 and X32_OUT (32 kHz crystal output). |
| 13 | PF.3 | bidirectional | GPIO port F pin 3 with multi-function alternates UART0_TXD, I2C0_SCL and XT1_IN (external crystal input). |
| 14 | PF.2 | bidirectional | GPIO port F pin 2 with multi-function alternates UART0_RXD, I2C0_SDA and XT1_OUT (external crystal output). |
| 15 | PA.7 | bidirectional | GPIO port A pin 7 with multi-function alternates UART0_TXD, I2C1_SCL, PWM1_CH4, ACMP0_WLAT, TM2 and INT1. |
| 16 | PA.6 | bidirectional | GPIO port A pin 6 with multi-function alternates UART0_RXD, I2C1_SDA, PWM1_CH5, ACMP1_WLAT, TM3 and INT0. |
| 17 | PA.5 | bidirectional | GPIO port A pin 5 with multi-function alternates UART0_nCTS, UART0_TXD, I2C0_SCL and PWM0_CH0. |
| 18 | PA.4 | bidirectional | GPIO port A pin 4 with multi-function alternates SPI0_I2SMCLK, UART0_nRTS, UART0_RXD, I2C0_SDA and PWM0_CH1. |
| 19 | PA.3 | bidirectional | GPIO port A pin 3 with multi-function alternates SPI0_SS, UART1_TXD, I2C1_SCL, PWM0_CH2, CLKO and PWM1_BRAKE1. |
| 20 | PA.2 | bidirectional | GPIO port A pin 2 with multi-function alternates SPI0_CLK, UART1_RXD, I2C1_SDA and PWM0_CH3. |
| 21 | PA.1 | bidirectional | GPIO port A pin 1 with multi-function alternates SPI0_MISO, UART0_TXD, UART1_nCTS and PWM0_CH4. |
| 22 | PA.0 | bidirectional | GPIO port A pin 0 with multi-function alternates SPI0_MOSI, UART0_RXD, UART1_nRTS and PWM0_CH5. |
| 23 | PF.15 | bidirectional | GPIO port F pin 15 with multi-function alternates PWM0_BRAKE0, PWM0_CH1, TM2, CLKO and INT4. |
| 24 | nRESET | input | External active-low reset input for the MCU. |
| 25 | PF.0 | bidirectional | GPIO port F pin 0 with multi-function alternates UART1_TXD, I2C1_SCL, UART0_TXD and ICE_DAT (ICE data). |
| 26 | PF.1 | bidirectional | GPIO port F pin 1 with multi-function alternates UART1_RXD, I2C1_SDA, UART0_RXD and ICE_CLK (ICE clock). |
| 27 | PC.5 | bidirectional | GPIO port C pin 5 with multi-function alternates UART2_TXD, I2C1_SCL and PWM1_CH0. |
| 28 | PC.4 | bidirectional | GPIO port C pin 4 with multi-function alternates UART2_RXD, I2C1_SDA and PWM1_CH1. |
| 29 | PC.3 | bidirectional | GPIO port C pin 3 with multi-function alternates UART2_nRTS and PWM1_CH2. |
| 30 | PC.2 | bidirectional | GPIO port C pin 2 with multi-function alternates UART2_nCTS and PWM1_CH3. |
| 31 | PC.1 | bidirectional | GPIO port C pin 1 with multi-function alternates UART2_TXD, I2C0_SCL, PWM1_CH4 and ACMP0_O. |
| 32 | PC.0 | bidirectional | GPIO port C pin 0 with multi-function alternates UART2_RXD, I2C0_SDA, PWM1_CH5 and ACMP1_O. |
| 33 | PA.12 | bidirectional | GPIO port A pin 12 with multi-function alternate I2C1_SCL. |
| 34 | PA.13 | bidirectional | GPIO port A pin 13 with multi-function alternate I2C1_SDA. |
| 35 | PA.14 | bidirectional | GPIO port A pin 14 with multi-function alternate UART0_TXD. |
| 36 | PA.15 | bidirectional | GPIO port A pin 15 with multi-function alternate UART0_RXD. |
| 37 | VSS | power_in | Ground reference for the digital core and I/O. |
| 38 | LDO_CAP | power_out | Internal LDO output pin that requires an external capacitor; the capacitor value is not given in this excerpt. |
| 39 | VDD | power_in | Digital supply input for the MCU. |
| 40 | PC.14 | bidirectional | GPIO port C pin 14 with multi-function alternates SPI0_I2SMCLK, USCI0_CTL0 and TM1. |
| 41 | PB.15 | bidirectional | GPIO port B pin 15 with multi-function alternates ADC0_CH15, SPI0_SS, USCI0_CTL1, UART0_nCTS, PWM1_CH0, TM0_EXT and PWM0_BRAKE1. |
| 42 | PB.14 | bidirectional | GPIO port B pin 14 with multi-function alternates ADC0_CH14, SPI0_CLK, USCI0_DAT1, UART0_nRTS, PWM1_CH1, TM1_EXT and CLKO. |
| 43 | PB.13 | bidirectional | GPIO port B pin 13 with multi-function alternates ADC0_CH13, ACMP0_P3, ACMP1_P3, SPI0_MISO, USCI0_DAT0, UART0_TXD, PWM1_CH2 and TM2_EXT. |
| 44 | PB.12 | bidirectional | GPIO port B pin 12 with multi-function alternates ADC0_CH12, ACMP0_P2, ACMP1_P2, SPI0_MOSI, USCI0_CLK, UART0_RXD, PWM1_CH3 and TM3_EXT. |
| 45 | AVDD | power_in | Analog supply input for the ADC and analog peripherals. |
| 46 | AVSS | power_in | Analog ground for the ADC and analog peripherals. |
| 47 | PB.7 | bidirectional | GPIO port B pin 7 with multi-function alternates ADC0_CH7, UART1_TXD, PWM1_BRAKE0, PWM1_CH4, INT5 and ACMP0_O. |
| 48 | PB.6 | bidirectional | GPIO port B pin 6 with multi-function alternates ADC0_CH6, UART1_RXD, PWM1_BRAKE1, PWM1_CH5, INT4 and ACMP1_O. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC power supply (VDD-VSS) | VDD-VSS | -0.3 | | 4 | V | | 228 |
| Input voltage on 5V-tolerance I/O | VIN | | | 5.5 | V | | 228 |
| Input voltage on any other pin | VIN | | | 4 | V | | 228 |
| Maximum current into VDD | ΣIDD | | | 150 | mA | | 228 |
| Maximum current out of VSS | ΣISS | | | 100 | mA | | 228 |
| Maximum current sunk by a I/O pin | IIO | | | 20 | mA | | 228 |
| Maximum current sourced by a I/O pin | IIO | | | 20 | mA | | 228 |
| Maximum current sunk by total I/O pins | | | | 100 | mA | | 228 |
| Maximum current sourced by total I/O pins | | | | 100 | mA | | 228 |
| Maximum injected current by a I/O pin | IINJ(PIN) | -5 | | 5 | mA | | 228 |
| Maximum injected current by total I/O pins | ΣIINJ(PIN) | -25 | | 25 | mA | | 228 |
| Electrostatic discharge, human body mode | VHBM | -6000 | | 6000 | V | ANSI/ESDA/JEDEC JS-001 (M03xB/C/D/E table) | 231 |
| Electrostatic discharge, charge device model | VCDM | -1000 | | 1000 | V | ANSI/ESDA/JEDEC JS-002 (M03xB/C/D/E table) | 231 |
| Pin current for latch-up | LU | -400 | | 400 | mA | JEDEC EIA/JESD78 | 231 |
| Fast transient voltage burst | VEFT | -4.4 | | 4.4 | kV | IEC 61000-4-4, class 4A | 231 |
| Operating ambient temperature | TA | -40 | | 105 | °C | | 230 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 230 |
| Storage temperature | TST | -65 | | 150 | °C | | 230 |
| Operating ambient temperature (general operating conditions) | TA | -40 | | 105 | °C | | 234 |
| Internal AHB clock frequency | fHCLK | | | 48 | MHz | VDD = 1.8 V~3.6V | 234 |
| Internal AHB clock frequency | fHCLK | | | 72 | MHz | VDD = 2.0 V~3.6V | 234 |
| Operation voltage (fHCLK up to 48 MHz) | VDD | 1.8 | | 3.6 | V | fHCLK up to 48 MHz | 234 |
| Operation voltage (fHCLK up to 72 MHz) | VDD | 2 | | 3.6 | V | fHCLK up to 72 MHz | 234 |
| Analog reference voltage | VREF | 1.8 | | | V | AVDD − VREF < 1.2 V | 234 |
| Band-gap voltage | VBG | 1.16 | 1.23 | 1.31 | | | 234 |
| ESR of CLDO output capacitor | RESR | 0.1 | | 10 | Ω | | 234 |
| Input leakage current | ILK | -1 | | 1 | A | VSS < VIN < VDD, Open-drain or input only mode | 244 |
| Source current for quasi-bidirectional mode and high level | ISR | -25.5 | -28 | -31 | µA | VDD = 3.3 V, VIN=(VDD-0.4) V | 245 |
| Source current for quasi-bidirectional mode and high level | ISR | -19 | -22 | -24 | µA | VDD = 2.5 V, VIN=(VDD-0.4) V | 245 |
| Source current for quasi-bidirectional mode and high level | ISR | -10.5 | -13 | -16 | µA | VDD = 1.8 V, VIN=(VDD-0.4) V | 245 |
| Source current for push-pull mode and high level | ISR | -8 | -10 | -15 | mA | VDD = 3.3 V, VIN=(VDD-0.4) V | 245 |
| Source current for push-pull mode and high level | ISR | -6 | -8 | -13 | mA | VDD = 2.5 V, VIN=(VDD-0.4) V | 245 |
| Source current for push-pull mode and high level | ISR | -3.5 | -5.5 | -10.5 | mA | VDD = 1.8 V, VIN=(VDD-0.4) V | 245 |
| Sink current for push-pull mode and low level | ISK | 7.5 | 9 | 14.5 | mA | VDD = 3.3 V, VIN= 0.4 V | 245 |
| Sink current for push-pull mode and low level | ISK | 6 | 7.5 | 13 | mA | VDD = 2.5 V, VIN= 0.4 V | 245 |
| Sink current for push-pull mode and low level | ISK | 3.5 | 5 | 10.5 | mA | VDD = 1.8 V, VIN= 0.4 V | 245 |
| nRESET input filtered pulse time (power-down mode) | tFR | 75 | | 155 | µs | Power down mode | 245 |
| POR reset voltage | VPOR | 1.35 | 1.5 | 1.65 | V | | 256 |
| LVR reset voltage | VLVR | 1.6 | 1.7 | 1.8 | V | | 256 |
| BOD brown-out detect voltage | VBOD | 1.8 | 2 | 2.2 | V | BODVL = 0 | 256 |
| BOD brown-out detect voltage | VBOD | 2.3 | 2.5 | 2.7 | V | BODVL = 1 | 256 |
| Oscillator frequency (HIRC) | fHRC | 47.52 | 48 | 48.48 | MHz | TA = 25 °C, VDD = 3.3V | 246 |
| Frequency drift over temperature and voltage (HIRC) | | -1 | | 1 | % | TA = 25 °C, VDD = 3.3V | 246 |
| Frequency drift over temperature and voltage (HIRC) | | -2 | | 2 | % | TA = -40 °C ~ +105 °C, VDD = 1.8 ~ 3.6V | 246 |
| Oscillator frequency (LIRC) | FLRC | 38.016 | 38.4 | 38.784 | kHz | | 248 |
| Frequency drift over temperature and voltage (LIRC) | | -1 | | 1 | % | TA = 25 °C, VDD = 3.3V | 248 |
| Frequency drift over temperature and voltage (LIRC) | | -15 | | 15 | % | TA = -40~105 °C, VDD = 1.8V~3.6V, without software calibration | 248 |
| Oscillator frequency (HXT crystal/resonator) | fHXT | 4 | | 32 | MHz | | 249 |
| PLL input clock | fPLL_in | 3.2 | | 32 | MHz | | 254 |
| PLL multiplier output clock | fPLL_OUT | 50 | | 144 | MHz | | 254 |
| PLL locking time | TL | | | 500 | µs | | 254 |
| Program/erase endurance | NENDUR | 20000 | | | cycles | TJ = -40°C~125°C | 273 |
| Data retention | TRET | 65 | | | year | 20 kcycle, TJ = 55°C | 273 |
| Normal run mode, executed from Flash, all peripherals disable, 48 MHz | IDD_RUN | | 8.5 | 10.8 | mA | Max at TA = 105 °C; typ at TA = 25 °C | 235 |
| Normal run mode, executed from Flash, all peripherals enable, 48 MHz | IDD_RUN | | 19.5 | 24.21 | mA | Max at TA = 105 °C; typ at TA = 25 °C | 235 |
| Idle mode, all peripherals disable, 48 MHz | IDD_IDLE | | 3.85 | 5.26 | mA | Max at TA = 105 °C; typ at TA = 25 °C | 236 |
| Idle mode, all peripherals enable, 48 MHz | IDD_IDLE | | 14.94 | 18.79 | mA | Max at TA = 105 °C; typ at TA = 25 °C | 236 |
| Power-down mode, all peripherals disable | IDD_PD | | 12 | 700 | µA | Max at TA = 105 °C; typ at TA = 25 °C | 237 |
| Thermal resistance junction-ambient, 48-pin LQFP (7x7 mm) | θJA | | 60 | | °C/Watt | Determined according to JESD51-2 | 230 |
## CAD (KiCad official)
- Symbol: `M031LD2AE`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `m031ld2ae-etched.step` / `m031ld2ae-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `m031ld2ae.step` / `m031ld2ae.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nuvoton Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886690824273920) (283 pp, sha256 `1a8a8f8110d5e2e0`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/m031ld2ae-datasheet.pdf)