component
LWS6028AS
Public Made by Adomby adom
Lewa Micro MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LWS6028AS
Lewa Micro · MOSFETs · SOP-8
LWS6028AS from Lewa Micro, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; the drawing labels this pin S, and the part has a -60V VDSS and -10A continuous drain current rating. |
| 2 | S | passive | Source of the P-channel MOSFET; the drawing labels this pin S, and the part has a -60V VDSS and -10A continuous drain current rating. |
| 3 | S | passive | Source of the P-channel MOSFET; the drawing labels this pin S, and the part has a -60V VDSS and -10A continuous drain current rating. |
| 4 | G | input | Gate of the P-channel MOSFET; the absolute maximum gate-to-source voltage is ±20V and the threshold voltage is -1.8V typical. |
| 5 | D | passive | Drain of the P-channel MOSFET; the drawing labels this pin D, and the part has a -60V drain-to-source voltage rating and -40A pulsed drain current. |
| 6 | D | passive | Drain of the P-channel MOSFET; the drawing labels this pin D, and the part has a -60V drain-to-source voltage rating and -40A pulsed drain current. |
| 7 | D | passive | Drain of the P-channel MOSFET; the drawing labels this pin D, and the part has a -60V drain-to-source voltage rating and -40A pulsed drain current. |
| 8 | D | passive | Drain of the P-channel MOSFET; the drawing labels this pin D, and the part has a -60V drain-to-source voltage rating and -40A pulsed drain current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Lewa Micro |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS | -60 | V | 1 | |||
| Gate-to-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | -10 | A | TA=25℃ | 1 | ||
| Continuous Drain Current | ID | -6.4 | A | TA=100℃ | 1 | ||
| Pulsed Drain Current | IDM | -40 | A | Repetitive rating; pulse width limited by maximum junction temperature | 1 | ||
| Power Dissipation | PD | 3.1 | W | TA=25℃ | 1 | ||
| Single Pulse Avalanche Energy | EAS | 72 | mJ | VDD=-30V, L=0.1mH, RG=25Ω, Starting Tj=25℃ | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, TSTG | -55 | 150 | ℃ | 1 | ||
| Maximum Temperature for Soldering | TL | 260 | ℃ | 1 | |||
| Thermal Resistance, Junction-to-Ambient | RθJA | 40 | ℃/W | Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 μm thick) copper area for drain connection | 1 | ||
| Drain-to-Source Breakdown Voltage | -60 | V | VGS=0V, ID=-250µA | 2 | |||
| Drain-to-Source Leakage Current | IDSS | -1 | µA | VDS=-60V, VGS=0V | 2 | ||
| Gate to Source Forward Leakage | IGSS(F) | 100 | nA | VGS=+20V, VDS=0V | 2 | ||
| Gate to Source Reverse Leakage | IGSS(R) | -100 | nA | VGS=-20V, VDS=0V | 2 | ||
| Gate Threshold Voltage | VGS(TH) | -1.3 | -1.8 | -2.3 | V | VDS=VGS, ID=-250µA | 2 |
| Drain-to-Source On-Resistance | RDS(ON)1 | 18 | mΩ | VGS=-10V, ID=-10A | 2 | ||
| Diode Forward Current | IS | -10 | A | 2 | |||
| Diode Pulse Current | ISM | -40 | A | 2 | |||
| Diode Forward Voltage | VSD | -1.2 | V | IS=-10A, VGS=0V | 2 | ||
| Gate Resistance | RG | 7.3 | Ω | VGS=0V, VDS=0V, f=1MHz | 2 |
CAD (KiCad official)
- Symbol:
LWS6028AS - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
lws6028as-etched.step/lws6028as-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lws6028as.step/lws6028as.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Lewa Micro datasheet (10 pp, sha256
5cb83e4206f891bf, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LWS6028AS
**Lewa Micro** · MOSFETs · SOP-8
LWS6028AS from Lewa Micro, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET; the drawing labels this pin S, and the part has a -60V VDSS and -10A continuous drain current rating. |
| 2 | S | passive | Source of the P-channel MOSFET; the drawing labels this pin S, and the part has a -60V VDSS and -10A continuous drain current rating. |
| 3 | S | passive | Source of the P-channel MOSFET; the drawing labels this pin S, and the part has a -60V VDSS and -10A continuous drain current rating. |
| 4 | G | input | Gate of the P-channel MOSFET; the absolute maximum gate-to-source voltage is ±20V and the threshold voltage is -1.8V typical. |
| 5 | D | passive | Drain of the P-channel MOSFET; the drawing labels this pin D, and the part has a -60V drain-to-source voltage rating and -40A pulsed drain current. |
| 6 | D | passive | Drain of the P-channel MOSFET; the drawing labels this pin D, and the part has a -60V drain-to-source voltage rating and -40A pulsed drain current. |
| 7 | D | passive | Drain of the P-channel MOSFET; the drawing labels this pin D, and the part has a -60V drain-to-source voltage rating and -40A pulsed drain current. |
| 8 | D | passive | Drain of the P-channel MOSFET; the drawing labels this pin D, and the part has a -60V drain-to-source voltage rating and -40A pulsed drain current. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Lewa Micro |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDSS | | | -60 | V | | 1 |
| Gate-to-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID | | | -10 | A | TA=25℃ | 1 |
| Continuous Drain Current | ID | | | -6.4 | A | TA=100℃ | 1 |
| Pulsed Drain Current | IDM | | | -40 | A | Repetitive rating; pulse width limited by maximum junction temperature | 1 |
| Power Dissipation | PD | | | 3.1 | W | TA=25℃ | 1 |
| Single Pulse Avalanche Energy | EAS | | | 72 | mJ | VDD=-30V, L=0.1mH, RG=25Ω, Starting Tj=25℃ | 1 |
| Operating Junction and Storage Temperature Range | TJ, TSTG | -55 | | 150 | ℃ | | 1 |
| Maximum Temperature for Soldering | TL | | | 260 | ℃ | | 1 |
| Thermal Resistance, Junction-to-Ambient | RθJA | | | 40 | ℃/W | Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 μm thick) copper area for drain connection | 1 |
| Drain-to-Source Breakdown Voltage | | -60 | | | V | VGS=0V, ID=-250µA | 2 |
| Drain-to-Source Leakage Current | IDSS | | | -1 | µA | VDS=-60V, VGS=0V | 2 |
| Gate to Source Forward Leakage | IGSS(F) | | | 100 | nA | VGS=+20V, VDS=0V | 2 |
| Gate to Source Reverse Leakage | IGSS(R) | | | -100 | nA | VGS=-20V, VDS=0V | 2 |
| Gate Threshold Voltage | VGS(TH) | -1.3 | -1.8 | -2.3 | V | VDS=VGS, ID=-250µA | 2 |
| Drain-to-Source On-Resistance | RDS(ON)1 | | | 18 | mΩ | VGS=-10V, ID=-10A | 2 |
| Diode Forward Current | IS | | | -10 | A | | 2 |
| Diode Pulse Current | ISM | | | -40 | A | | 2 |
| Diode Forward Voltage | VSD | | | -1.2 | V | IS=-10A, VGS=0V | 2 |
| Gate Resistance | RG | | 7.3 | | Ω | VGS=0V, VDS=0V, f=1MHz | 2 |
## CAD (KiCad official)
- Symbol: `LWS6028AS`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `lws6028as-etched.step` / `lws6028as-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lws6028as.step` / `lws6028as.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Lewa Micro datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756664024337793024) (10 pp, sha256 `5cb83e4206f891bf`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lws6028as-datasheet.pdf)