component
LW5928N23C
Public Made by Adomby adom
Lewa Micro Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LW5928N23C
Lewa Micro · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23
LW5928N23C from Lewa Micro, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; in the SOT23 package this is the only ground connection, and the datasheet recommends separate VIN and VOUT ground planes joined only at the GND pin. |
| 2 | VOUT | power_out | Regulated output pin that needs a low-ESR capacitor, at least the nominal recommended value, from OUT to GND; an internal pulldown discharges OUT when the regulator is in shutdown (VEN < VEN(LOW)), with output current rated 0 to 400 mA. |
| 3 | VIN | power_in | Input supply pin with a recommended operating range of 1.6 V to 7.0 V, which needs the recommended or larger ceramic input capacitor to ground placed as close to the pin as possible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Lewa Micro |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 1.6 | 7 | V | 5 | ||
| Output Accuracy | VOUT | -1.5 | 1.5 | % | IOUT= 1mA | 5 | |
| Current Limit | ILIM | 410 | 530 | mA | 5 | ||
| Quiescent Current | IQ | 0.65 | 1 | μA | VIN= VEN= VOUT +1V, No Load | 5 | |
| Line Regulation | ΔVOUT/(ΔVIN*VOUT(NOM)) | 0.1 | 0.3 | %/V | VIN= VOUT +1.0V to 7.0V, IOUT=1mA | 5 | |
| Load Regulation | ΔVOUT | 30 | 70 | mV | 1mA≤IOUT≤400mA | 5 | |
| Shutdown Current | ISHD | 0.1 | μA | VIN=7.0V, VEN=0V | 5 | ||
| EN High Voltage | VENH | 1.5 | V | VIN=1.8V to 7.0V, IOUT=1mA | 5 | ||
| EN Low Voltage | VENL | 0.6 | V | 5 | |||
| Short Current | ISHORT | 100 | mA | VOUT=0V | 5 | ||
| Startup Time | TSTR | 800 | μs | From VEN 'L'→'H' to 95%*VOUT, COUT=1μF, No Load | 5 | ||
| Power Supply Rejection Ratio | PSRR | 55 | dB | VIN= 4.3V, VOUT=3.3V, VPP=0.5V, COUT=1μF, CIN=none, IOUT=10mA, f=217Hz | 5 | ||
| Power Supply Rejection Ratio | PSRR | 45 | dB | VIN= 4.3V, VOUT=3.3V, VPP=0.5V, COUT=1μF, CIN=none, IOUT=10mA, f=1kHz | 5 | ||
| Power Supply Rejection Ratio | PSRR | 35 | dB | VIN= 4.3V, VOUT=3.3V, VPP=0.5V, COUT=1μF, CIN=none, IOUT=10mA, f=10kHz | 5 | ||
| Thermal Shutdown Temperature | TSD | 155 | ℃ | Temperature rising | 5 | ||
| TSD Hysteresis | ΔTSD | 20 | ℃ | Temperature falling | 5 | ||
| Output Discharge Resistance | RDSCHG | 250 | Ω | VIN= 7.0V, VEN=0V | 5 | ||
| Input Voltage (recommended) | VIN | 1.6 | 7 | V | 4 | ||
| EN Pin Voltage (recommended) | VEN | 0 | 7 | V | 4 | ||
| VOUT Pin Voltage (recommended) | VOUT | 0.8 | 5 | V | 4 | ||
| Output Current (recommended) | IOUT | 0 | 400 | mA | 4 | ||
| Junction Temperature Range (recommended) | TJ | -40 | 125 | ℃ | 4 | ||
| Supply Voltage (absolute maximum) | VIN | -0.3 | 9 | V | 4 | ||
| EN Pin Voltage (absolute maximum) | VEN | -0.3 | 9 | V | 4 | ||
| VOUT Pin Voltage (absolute maximum) | VOUT | -0.3 | V | Printed upper limit is VIN+0.3 | 4 | ||
| ESD Susceptibility, HBM | V(ESD) | -4000 | 4000 | V | HBM, per ANSI/ESDA/JEDEC JS-001 | 4 | |
| Junction Temperature Range (absolute maximum) | TJ | -40 | 150 | ℃ | 4 | ||
| Storage Temperature Range | TSTG | -40 | 150 | ℃ | 4 | ||
| Lead Temperature (Soldering) | TSOLDER | 260 | ℃ | 10s | 4 | ||
| Junction-to-ambient Thermal Resistance (SOT23) | RθJA | 363 | ℃/W | SOT23 package; device mounted on FR-4 PCB, per JESD51-3 | 4 |
CAD (KiCad official)
- Symbol:
LW5928N23C - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
lw5928n23c-etched.step/lw5928n23c-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lw5928n23c.step/lw5928n23c.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Lewa Micro datasheet (25 pp, sha256
53294d4f1daeb984, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LW5928N23C
**Lewa Micro** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23
LW5928N23C from Lewa Micro, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; in the SOT23 package this is the only ground connection, and the datasheet recommends separate VIN and VOUT ground planes joined only at the GND pin. |
| 2 | VOUT | power_out | Regulated output pin that needs a low-ESR capacitor, at least the nominal recommended value, from OUT to GND; an internal pulldown discharges OUT when the regulator is in shutdown (VEN < VEN(LOW)), with output current rated 0 to 400 mA. |
| 3 | VIN | power_in | Input supply pin with a recommended operating range of 1.6 V to 7.0 V, which needs the recommended or larger ceramic input capacitor to ground placed as close to the pin as possible. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Lewa Micro |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 1.6 | | 7 | V | | 5 |
| Output Accuracy | VOUT | -1.5 | | 1.5 | % | IOUT= 1mA | 5 |
| Current Limit | ILIM | 410 | | 530 | mA | | 5 |
| Quiescent Current | IQ | | 0.65 | 1 | μA | VIN= VEN= VOUT +1V, No Load | 5 |
| Line Regulation | ΔVOUT/(ΔVIN*VOUT(NOM)) | | 0.1 | 0.3 | %/V | VIN= VOUT +1.0V to 7.0V, IOUT=1mA | 5 |
| Load Regulation | ΔVOUT | | 30 | 70 | mV | 1mA≤IOUT≤400mA | 5 |
| Shutdown Current | ISHD | | 0.1 | | μA | VIN=7.0V, VEN=0V | 5 |
| EN High Voltage | VENH | | 1.5 | | V | VIN=1.8V to 7.0V, IOUT=1mA | 5 |
| EN Low Voltage | VENL | | 0.6 | | V | | 5 |
| Short Current | ISHORT | | 100 | | mA | VOUT=0V | 5 |
| Startup Time | TSTR | | 800 | | μs | From VEN 'L'→'H' to 95%*VOUT, COUT=1μF, No Load | 5 |
| Power Supply Rejection Ratio | PSRR | | 55 | | dB | VIN= 4.3V, VOUT=3.3V, VPP=0.5V, COUT=1μF, CIN=none, IOUT=10mA, f=217Hz | 5 |
| Power Supply Rejection Ratio | PSRR | | 45 | | dB | VIN= 4.3V, VOUT=3.3V, VPP=0.5V, COUT=1μF, CIN=none, IOUT=10mA, f=1kHz | 5 |
| Power Supply Rejection Ratio | PSRR | | 35 | | dB | VIN= 4.3V, VOUT=3.3V, VPP=0.5V, COUT=1μF, CIN=none, IOUT=10mA, f=10kHz | 5 |
| Thermal Shutdown Temperature | TSD | | 155 | | ℃ | Temperature rising | 5 |
| TSD Hysteresis | ΔTSD | | 20 | | ℃ | Temperature falling | 5 |
| Output Discharge Resistance | RDSCHG | | 250 | | Ω | VIN= 7.0V, VEN=0V | 5 |
| Input Voltage (recommended) | VIN | 1.6 | | 7 | V | | 4 |
| EN Pin Voltage (recommended) | VEN | 0 | | 7 | V | | 4 |
| VOUT Pin Voltage (recommended) | VOUT | 0.8 | | 5 | V | | 4 |
| Output Current (recommended) | IOUT | 0 | | 400 | mA | | 4 |
| Junction Temperature Range (recommended) | TJ | -40 | | 125 | ℃ | | 4 |
| Supply Voltage (absolute maximum) | VIN | -0.3 | | 9 | V | | 4 |
| EN Pin Voltage (absolute maximum) | VEN | -0.3 | | 9 | V | | 4 |
| VOUT Pin Voltage (absolute maximum) | VOUT | -0.3 | | | V | Printed upper limit is VIN+0.3 | 4 |
| ESD Susceptibility, HBM | V(ESD) | -4000 | | 4000 | V | HBM, per ANSI/ESDA/JEDEC JS-001 | 4 |
| Junction Temperature Range (absolute maximum) | TJ | -40 | | 150 | ℃ | | 4 |
| Storage Temperature Range | TSTG | -40 | | 150 | ℃ | | 4 |
| Lead Temperature (Soldering) | TSOLDER | | | 260 | ℃ | 10s | 4 |
| Junction-to-ambient Thermal Resistance (SOT23) | RθJA | | 363 | | ℃/W | SOT23 package; device mounted on FR-4 PCB, per JESD51-3 | 4 |
## CAD (KiCad official)
- Symbol: `LW5928N23C`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lw5928n23c-etched.step` / `lw5928n23c-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lw5928n23c.step` / `lw5928n23c.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Lewa Micro datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758137695162392576) (25 pp, sha256 `53294d4f1daeb984`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lw5928n23c-datasheet.pdf)