component
LW5118N11E
Public Made by Adomby adom
Lewa Micro Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4L(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "lw5118n11e",
"title": "LW5118N11E",
"brief": "Lewa Micro Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4L(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"power management (pmic)",
"lw5118n11e",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "LW5118N11E",
"manufacturer": "Lewa Micro",
"package": "DFN-4L(1x1)",
"pin_count": 5,
"category": "Power Management (PMIC)",
"subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756664172304314368",
"parts": {
"symbol": "lw5118n11e.kicad_sym",
"footprint": "lw5118n11e.kicad_mod",
"model_3d": "lw5118n11e-hero.glb",
"model_3d_plain": "lw5118n11e.glb",
"model_3d_step": "lw5118n11e-etched.step",
"model_3d_step_plain": "lw5118n11e.step",
"lbr": "lw5118n11e.lbr"
},
"distributor_links": {
"lcsc": "C20630422"
},
"distributor_check": {
"checked_at": "2026-10-09T09:57:50Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "VOUT",
"type": "power_out",
"description": "Regulated output of the LDO, factory-trimmed from 0.8V to 5.0V in 100mV steps (LW5118N11E is the 1.8V version), with at least 1µF ceramic output capacitor recommended for stability and placed no more than 0.5 inch from this pin."
},
{
"number": "2",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin; for best PSRR and transient response, the VIN and VOUT ground planes should connect only at this GND pin."
},
{
"number": "3",
"name": "EN",
"type": "input",
"description": "Chip enable input with recommended range 0 to 6.0V (absolute maximum -0.3 to 7.0V); VENH is 1.5V minimum and VENL is 0.5V maximum."
},
{
"number": "4",
"name": "VIN",
"type": "power_in",
"description": "Power supply input with recommended operating range 1.5V to 6.0V (absolute maximum -0.3 to 7.0V), with at least 1µF input capacitor placed within 0.5 inch of this pin."
},
{
"number": "5",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet lists the exposed pad as 'E-PAD' alongside pin 2 (GND) in the DFN1x1-4L column and giv; The DFN1x1-4L column of the pin table has no NC pin; NC appears only in the SOT23-5L column (pin 4),",
"exposed pad 5 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 17,
"cost_usd": 0.0536,
"at": "2026-10-09T09:55:59"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756664172304314368",
"pages": 17,
"sha256": "d3256afa983d583e",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 5,
"described": 5,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "lw5118n11e.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
1,
0.98,
0.57
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "86e5f8eefe287160705813dbaa7f6606754ab347715fbffa4ee680635c44541f",
"checked": "2026-10-09",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "lw5118n11e-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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0.98,
0.57
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "35ec25801e5304b42b6d35e2c3a034792172266a941cb51052ffaa1e5ec12e90",
"checked": "2026-10-09",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Lewa Micro",
"Package": "DFN-4L(1x1)",
"Category": "Power Management (PMIC)",
"Pins": "5"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"lw5118n11e"
],
"discovery_pitch": "LW5118N11E (Lewa Micro) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
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"README.md",
"lw5118n11e.kicad_sym",
"lw5118n11e.kicad_mod",
"lw5118n11e.glb",
"lw5118n11e.step",
"lw5118n11e.lbr",
"docs/hero.png",
"docs/lw5118n11e-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"lw5118n11e-hero.glb",
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],
"visibility": {
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}
}