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LV2862YDDCR

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs lv2862yddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers lv2862yddcr: viewers · Ray 1mo ago
lv2862yddcr-etched.fit.json lv2862yddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lv2862yddcr-etched.glb lv2862yddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lv2862yddcr-etched.step lv2862yddcr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lv2862yddcr.glb Publish 0.1.0 · Ray 1mo ago
lv2862yddcr.kicad_mod Publish 0.1.0 · Ray 1mo ago
lv2862yddcr.kicad_sym Publish 0.1.0 · Ray 1mo ago
lv2862yddcr.lbr Publish 0.1.0 · Ray 1mo ago
lv2862yddcr.step Publish 0.1.0 · Ray 1mo ago
package.json lv2862yddcr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json lv2862yddcr: specified limits as data (metadata.characteristics, 35 rows from the datasheet) · Ray 25d ago
README.md lv2862yddcr: specified limits as data (metadata.characteristics, 35 rows from the datasheet) · Ray 25d ago

LV2862YDDCR

Texas Instruments · DC-DC Converters · SOT-23-6

LV2862YDDCR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CB output Bootstrap capacitor voltage node for high-side MOSFET gate bias; CB to SW voltage must remain between -0.3 V and 6 V.
2 GND power_in Ground connection providing reference potential for all voltage measurements and internal circuits.
3 FB input Feedback voltage input for closed-loop output regulation; external resistor divider sets VOUT = 0.765 V (1 + R1/R2); operating range 0 V to 5 V.
4 SHDN input Enable/disable input (high voltage tolerant) with internal pullup current source; pull below 1.25 V to disable device; operating range 0 V to 60 V.
5 VIN power_in Power input voltage pin; operating range 4 V to 60 V with 65 V transient withstand; supplies internal circuits and serves as drain node for internal high-side MOSFET.
6 SW output Switch node; output of high-side MOSFET connected to inductor, diode, and bootstrap capacitor; operating voltage range -1 V to 60 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating input voltage (VIN) 4 60 V 5
Shutdown supply current 1 3 µA EN = 0 V 5
Rising SHDN threshold voltage 1.05 1.25 1.38 V 5
Feedback voltage (VFB) VFB 0.74 0.765 0.79 V 5
Switching frequency fSW (LV2862Y) fSW 1785 2100 2415 kHz 5
VIN input voltage (recommended) VIN 4 60 V 4
CB pin voltage (recommended) CB 4 66 V 4
CB to SW voltage (recommended) CB to SW -0.3 6 V 4
SW voltage (recommended) SW -1 60 V 4
FB voltage (recommended) FB 0 5 V 4
SHDN control voltage (recommended) SHDN 0 60 V 4
Operating junction temperature (recommended) TJ -40 125 °C 4
VIN to GND VIN -0.3 65 V 4
SHDN to GND SHDN -0.3 65 V 4
FB to GND FB -0.3 7 V 4
CB to SW CB to SW -0.3 7 V 4
SW to GND SW -1 65 V 4
SW to GND transient SW -2 65 V less than 30-ns transients 4
Operating junction temperature (absolute maximum) TJ -40 150 °C 4
Storage temperature range Tstg -55 165 °C 4
Undervoltage lockout threshold, rising 4 V 5
Undervoltage lockout threshold, falling 3 V 5
Quiescent current IQ (Eco-mode) IQ 28 µA Eco-mode, no load, VIN = 12 V, not switching 5
SHDN pin current -4.2 µA SHDN = 2.3 V 5
SHDN pin current -1 µA SHDN = 0.9 V 5
SHDN hysteresis current -3 µA 5
High-side MOSFET on-resistance 900 mΩ VIN = 12 V, CB to SW = 5.8 V 5
Minimum on-time tON-min tON-min 80 ns fSW = 2.1 MHz 5
Maximum duty cycle DMAX DMAX 96 % 5
Peak current limit threshold 1200 mA 5
Thermal shutdown trip point TSHUTDOWN 170 ºC 5
Thermal shutdown hysteresis Thys 10 ºC 5
Junction-to-ambient thermal resistance RθJA 102 °C/W JEDEC 3 in x 3 in 4-layer PCB, still air 4
Junction-to-case (top) thermal resistance RθJC(top) 36.9 °C/W 4
Junction-to-board thermal resistance RθJB 28.4 °C/W 4

CAD (KiCad official)

  • Symbol: LV2862YDDCR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: lv2862yddcr-etched.step / lv2862yddcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lv2862yddcr.step / lv2862yddcr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 a3cd442854a6e23d, retrieved 2026-09-26, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF