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Contents

README

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LV2862XLVDDCR

Texas Instruments · DC-DC Converters · SOT-23-6

LV2862XLVDDCR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CB output Bootstrap voltage source for high-side MOSFET gate drive, connect external ceramic capacitor between CB and SW pins.
2 GND power_in Ground connection.
3 FB input Feedback voltage input for output voltage regulation via external resistor divider network.
4 SHDN input Enable/disable input with high-voltage tolerance, pull below 1.25 V to disable or float to enable.
5 VIN power_in Power supply input accepting 4 V to 60 V, provides internal supply and high-side MOSFET drain connection.
6 SW output Switching node output connected to external inductor, diode, and bootstrap capacitor charging.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating input voltage 4 60 V 5
Shutdown supply current 1 3 µA EN = 0 V 5
Rising SHDN threshold voltage 1.05 1.25 1.38 V 5
Feedback voltage VFB 0.74 0.765 0.79 V 5
Switching frequency, LV2862X fSW 560 770 980 kHz 5
Operating input voltage VIN 4 60 V 4
CB pin voltage CB 4 66 V 4
CB to SW voltage CB to SW -0.3 6 V 4
SW voltage SW -1 60 V 4
FB voltage FB 0 5 V 4
SHDN control voltage SHDN 0 60 V 4
Operating junction temperature TJ -40 125 °C 4
VIN to GND voltage VIN -0.3 65 V 4
SHDN to GND voltage SHDN -0.3 65 V 4
FB to GND voltage FB -0.3 7 V 4
CB to SW voltage CB to SW -0.3 7 V 4
SW to GND voltage SW -1 65 V 4
SW to GND voltage, transient SW -2 65 V less than 30-ns transients 4
Operating junction temperature TJ -40 150 °C 4
Storage temperature range Tstg -55 165 °C 4
Thermal shutdown trip point TSHUTDOWN 170 ºC 5
Thermal shutdown hysteresis Thys 10 ºC 5
Junction-to-ambient thermal resistance RθJA 102 °C/W 4
Junction-to-case (top) thermal resistance RθJC(top) 36.9 °C/W 4
Junction-to-board characterization parameter RθJB 28.4 °C/W 4

CAD (KiCad official)

  • Symbol: LV2862XLVDDCR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: lv2862xlvddcr-etched.step / lv2862xlvddcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lv2862xlvddcr.step / lv2862xlvddcr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 a3cd442854a6e23d, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF