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Ray Publish 0.1.0 0408bc6 29d ago
{
  "slug": "lv14360sddar",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "lv14360sddar",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lv14360sddar.kicad_sym",
    "lv14360sddar.kicad_mod",
    "lv14360sddar.glb",
    "lv14360sddar.step",
    "lv14360sddar.lbr",
    "docs/hero.png",
    "docs/lv14360sddar-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lv14360sddar-hero.glb",
    "lv14360sddar-hero.overlay.json"
  ],
  "component": {
    "mpn": "LV14360SDDAR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-8-EP",
    "pin_count": 9,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://www.ti.com/cn/lit/gpn/lv14360",
    "parts": {
      "symbol": "lv14360sddar.kicad_sym",
      "footprint": "lv14360sddar.kicad_mod",
      "model_3d": "lv14360sddar-hero.glb",
      "model_3d_plain": "lv14360sddar.glb",
      "model_3d_step": "lv14360sddar-etched.step",
      "model_3d_step_plain": "lv14360sddar.step",
      "lbr": "lv14360sddar.lbr"
    },
    "distributor_links": {
      "lcsc": "C2879421",
      "digikey": "296-LV14360SDDARTR-ND",
      "mouser": "595-LV14360SDDAR"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T22:53:59Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-LV14360SDDARTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-LV14360SDDAR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "BOOT",
        "type": "power_in",
        "description": "Bootstrap capacitor connection for the high-side MOSFET driver; connect a high-quality 0.1-µF capacitor from BOOT to SW."
      },
      {
        "number": "2",
        "name": "VIN",
        "type": "power_in",
        "description": "Input supply pin with a recommended operating range of 4.3 V to 60 V; connect to the power supply and bypass capacitor CIN, keeping the path from VIN to CIN and GND as short as possible."
      },
      {
        "number": "3",
        "name": "EN",
        "type": "input",
        "description": "Precision enable input with internal pullup current source; pull below 1.2 V to disable, float or connect to VIN to enable, and it is rated 0 V to 60 V."
      },
      {
        "number": "4",
        "name": "RT/SYNC",
        "type": "input",
        "description": "Resistor timing or external clock input that sets the switching frequency (200 kHz to 2 MHz in RT mode, 250 kHz to 2 MHz in SYNC mode) and is rated 0 V to 3.3 V."
      },
      {
        "number": "5",
        "name": "FB",
        "type": "input",
        "description": "Feedback input connected to the feedback divider to set VOUT; it must not be shorted to ground during operation and is rated 0 V to 5 V."
      },
      {
        "number": "6",
        "name": "SS",
        "type": "input",
        "description": "Soft-start pin for the soft-start version, connected to a capacitor that sets the soft-start time; it is rated 0 V to 3 V."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "System ground pin."
      },
      {
        "number": "8",
        "name": "SW",
        "type": "power_out",
        "description": "Switching output of the regulator, internally connected to the high-side power MOSFET and connected to the power inductor; rated -1 V to 60 V."
      },
      {
        "number": "9",
        "name": "Thermal Pad",
        "type": "power_in",
        "description": "Major heat dissipation path of the die that must be connected to the ground plane on the PCB."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 6 is shared as SS (soft-start) on the LV14360S and PGOOD (power-good open-drain output) on the L; The thermal pad is listed as pin 9 in the pin table and figure, but it is not an 8-lead pin. Confirm; The datasheet classifies BOOT and SW only as type P (power). The KiCad types power_in for BOOT and p"
        ],
        "pages_sent": 7,
        "cost_usd": 0.0404,
        "at": "2026-10-11T22:53:44"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/lv14360",
        "pages": 35,
        "sha256": "8e75b5bff257117f",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 9,
        "described": 9,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "lv14360sddar.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.55
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2d6f7e774e8143e3320cbd59eb5be9f3b7864614644e3b072006e1eb05fb7fa6",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lv14360sddar-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.55
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "df4c0f2cad9ee8c4715757b03f6dd19a60b25486dfa226b7d7031f3ae6678784",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}