component
LTV-332J-TP1
Public Made by Adomby adom
Lite On Logic Output Optoisolators, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLTV-332J-TP1
Lite On · Logic Output Optoisolators · SOP-16
LTV-332J-TP1 from Lite On, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VS | power_in | Input ground for the input (LED and VCC1) side, listed as 'Input Ground' in the pin description. |
| 2 | VCC1 | power_in | Positive input supply voltage, specified at 3.3 V to 5.5 V. |
| 3 | FAULT | output | Open-collector fault output that goes from high impedance to logic low within 5 μs when the DESAT voltage exceeds the internal 7 V reference, and can be wired-OR with other devices. |
| 4 | VS | power_in | Input ground for the input (LED and VCC1) side, listed as 'Input Ground' in the pin description. |
| 5 | CATHODE | input | Cathode of the AlGaAs input LED; recommended ON input current is 8 mA to 12 mA. |
| 6 | ANODE | input | Anode of the AlGaAs input LED; average forward input current is limited to 25 mA absolute maximum. |
| 7 | ANODE | input | Anode of the AlGaAs input LED; average forward input current is limited to 25 mA absolute maximum. |
| 8 | CATHODE | input | Cathode of the AlGaAs input LED; recommended ON input current is 8 mA to 12 mA. |
| 9 | VEE | power_in | Output supply voltage (negative output rail) for the gate driver output stage. |
| 10 | VCLAMP | passive | Miller clamp pin with 1.7 A peak clamp sinking current; it must be shorted to VEE if the clamp is not used. |
| 11 | VOUT | output | Gate drive voltage output rated for 5.0 A maximum peak output current. |
| 12 | VEE | power_in | Output supply voltage (negative output rail) for the gate driver output stage. |
| 13 | VCC2 | power_in | Positive output supply voltage; the recommended total output supply (VCC2-VEE) is 15 V to 30 V. |
| 14 | DESAT | input | Desaturation voltage input; when DESAT exceeds the internal 6.5 V reference while the IGBT is on, FAULT goes low within 5 μs. |
| 15 | VLED | unconnected | LED anode for optical coupling testing only; this pin must be left unconnected for guaranteed datasheet performance. |
| 16 | VE | power_in | Common (IGBT emitter) output supply reference; the recommended VCC2-VE range is 15 V to 30 V minus (VE-VEE). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Lite On |
| Package | SOP-16 |
| Category | Optoisolators |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | Tstg | -55 | 125 | oC | 9 | ||
| Operating Temperature | Topr | -40 | 105 | oC | 9 | ||
| Output IC Junction Temperature | TJ | 125 | oC | 9 | |||
| Average Forward Input Current | IF | 25 | mA | 9 | |||
| Reverse Input Voltage | VR | 5 | V | 9 | |||
| Peak Transient Input Current | IF(TRAN) | 1 | A | 9 | |||
| High Peak Output Current | IOH(PEAK) | 5 | A | 9 | |||
| Low Peak Output Current | IOL(PEAK) | 5 | A | 9 | |||
| Positive Input Supply Voltage | VCC1 | -0.5 | 7 | V | 9 | ||
| FAULT Output Current | IFAULT | 8 | mA | 9 | |||
| FAULT Pin Voltage | VFAULT | -0.5 | V | 9 | |||
| Total Output Supply Voltage (VCC2 -VEE) | VCC2-VEE | -0.5 | 35 | V | 9 | ||
| Negative Output Supply Voltage (VE-VEE) | VE-VEE | -0.5 | 15 | V | 9 | ||
| Positive Output Supply Voltage (VCC2 -VE) | VCC2-VE | -0.5 | V | 9 | |||
| Output Voltage | VO(PEAK) | -0.5 | 35 | V | 9 | ||
| Peak Clamping Sinking Current | IClamp | 1.7 | A | 9 | |||
| Miller Clamping Pin Voltage | VClamp | -0.5 | V | 9 | |||
| Power Dissipation | PI | 150 | mW | 9 | |||
| Output Power Dissipation | PO | 600 | mW | 9 | |||
| Lead Solder Temperature | Tsol | 260 | oC | 10s | 9 | ||
| Operating Temperature | TA | -40 | 105 | oC | 10 | ||
| Total Output Supply Voltage (VCC2-VEE) | 15 | 30 | V | 10 | |||
| Negative Output Supply Voltage (VE-VEE) | 0 | 15 | V | 10 | |||
| Positive Output Supply Voltage (VCC2-VE) | 15 | V | 10 | ||||
| Input Current (ON) | IFL(ON) | 8 | 12 | mA | 10 | ||
| Input Voltage (OFF) | VF(OFF) | -3.6 | 0.8 | V | 10 | ||
| Input Forward Voltage | VF | 1.2 | 1.37 | 1.8 | V | IF = 10mA | 10 |
| Input Threshold Current (Low to High) | IFLH | 2.5 | 6 | mA | IO = 0 A, VO > 5V | 10 | |
| FAULT Logic Low Output Voltage | VFAULT | 0.4 | V | IFAULT = 1.1 mA, VCC1 = 5.5 V | 10 | ||
| FAULT Logic High Output Current | IFAULT | 0.5 | μA | VFAULT = 5.5 V, VCC1 = 5.5 V | 10 | ||
| FAULT Logic High Output Current | IFAULT | 0.3 | μA | VFAULT = 3.3 V, VCC1 = 3.3 V | 10 | ||
| High Level Supply Current | ICC2H | 2.4 | 4.5 | mA | Output Open, IF = 7 to 16 mA | 10 | |
| Low Level Supply Current | ICC2L | 2.5 | 4.5 | mA | Output Open, VF = 0 to +0.8 V | 11 | |
| High Level Output Current | IOH | -2 | A | VO = VCC2, 3 V | 11 | ||
| High Level Output Current | IOH | -5 | A | Vo = VCC2, 7 V | 11 | ||
| Low Level Output Current | IOL | 2 | A | VO = VEE + 2 V | 11 | ||
| Low Level Output Current | IOL | 5 | A | VO = VEE + 6 V | 11 | ||
| Clamp Low Level Sinking Current | ICL | 0.5 | 4 | A | VO = VEE + 2.5 | 11 | |
| Blanking Capacitor Charging Current | ICHG | -0.13 | -0.24 | -0.33 | mA | VDESAT = 2 V | 11 |
| Blanking Capacitor Discharge Current | IDSCHG | 10 | 30 | mA | VDESAT = 7 V | 11 | |
| DESAT Threshold | VDESAT | 6 | 6.5 | 7.5 | V | VCC2, VE > VUVLO- | 11 |
| UVLO Threshold VUVLO+ | VUVLO+ | 10.5 | 11.6 | 12.5 | V | VO > 5V, IF = 10 mA | 11 |
| UVLO Threshold VUVLO- | VUVLO- | 9.2 | 10.3 | 11.1 | V | VO < 5V, IF = 10 mA | 11 |
| Propagation Delay Time to High Output Level | tPLH | 50 | 200 | ns | Rg = 10 Ω, Cg = 10 nF, f = 10 kHz, Duty Cycle = 50%, IF = 10 mA, VCC2 = 30V | 11 | |
| Propagation Delay Time to Low Output Level | tPHL | 50 | 200 | ns | Rg = 10 Ω, Cg = 10 nF, f = 10 kHz, Duty Cycle = 50%, IF = 10 mA, VCC2 = 30V | 11 | |
| Pulse Width Distortion | PWD | -80 | 80 | ns | 11 | ||
| Propagation delay difference between any two parts or channels | PDD | -100 | 100 | ns | 11 | ||
| DESAT Sense to 90% VO Delay | tDESAT(90%) | 0.25 | 0.5 | μs | CDESAT = 100 pF, Rg =10 Ω, Cg = 10 nF, VCC2 = 30 V | 11 | |
| DESAT Sense to 10% VO Delay | tDESAT(10%) | 2 | 3 | μs | CDESAT = 100 pF, Rg =10 Ω, Cg = 10 nF, VCC2 = 30 V | 11 | |
| DESAT Sense to Low Level FAULT Signal Delay | tDESAT(FAULT) | 0.25 | 0.5 | μs | CDESAT =100pF,RF = 2.1 kΩ, CF = 1 nF, Rg = 10 Ω, Cg = 10 nF, VCC2 = 30 V | 11 | |
| RESET to High Level FAULT Signal Delay | tRESET(FAULT) | 0.2 | 1 | 2 | μs | CDESAT =100pF,RF = 2.1 kΩ, Rg =10 Ω,Cg =10nF, VCC1 = 5.5 V, VCC2 = 30 V | 12 |
| Common mode transient immunity at high level output | /CMH/ | 50 | kV/μs | TA = 25°C, I F = 10 mA, VCM = 1500 V, VCC2 = 30 V, RF = 2.1 kΩ, CF = 1 nF | 12 | ||
| Common mode transient immunity at low level output | /CML/ | 50 | kV/μs | TA = 25°C, V F = 0 V, VCM = 1500 V, VCC2 = 30 V, RF = 2.1 kΩ, CF = 1 nF | 12 | ||
| Withstand Insulation Test Voltage | VISO | 5000 | V | RH ≤ 40-60%, t = 1min, TA = 25°C | 15 | ||
| Maximum Working Insulation Voltage | VIORM | 1414 | Vpeak | 7 | |||
| Highest Allowable Overvoltage (Transient Overvoltage, tini = 60 sec) | VIOTM | 8000 | Vpeak | 7 | |||
| Safety Limiting Case Temperature | TS | 175 | oC | 7 | |||
| Safety Limiting Input Current | IS, INPUT | 400 | mA | 7 | |||
| Safety Limiting Output Power | PS, OUTPUT | 1200 | mW | 7 |
CAD (KiCad official)
- Symbol:
LTV-332J-TP1 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
ltv-332j-tp1-etched.step/ltv-332j-tp1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltv-332j-tp1.step/ltv-332j-tp1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Lite On datasheet (23 pp, sha256
eb4c7077dad862e1, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).