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LTP3558-33XT4
Public Made by Adomby adom
Linearin Linear Voltage Regulators (LDO), SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LTP3558-33XT4
Linearin · Linear Voltage Regulators (LDO) · SOT-89-3
LTP3558-33XT4 from Linearin, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground. |
| 2 | IN | power_in | Supply input pin; must be closely decoupled to GND with a 1μF or greater ceramic capacitor. |
| 3 | OUT | power_out | Output pin; bypass with a 1μF or greater ceramic capacitor from this pin to ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Linearin |
| Package | SOT-89-3 |
| Category | Power Supply Chip |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Dropout Voltage | VDROP | 820 | mV | VOUT= 3.3 V, IOUT = 150mA | 5 | ||
| Dropout Voltage | VDROP | 520 | mV | VOUT= 3.3 V, IOUT = 100mA | 5 | ||
| DC Supply Quiescent Current | IQ | 1.5 | 3 | µA | 5 | ||
| Output Voltage Line Regulation | RegLINE | 0.01 | 0.04 | %/V | VIN = VOUT +1V to 30V, IOUT = 10mA | 5 | |
| Output Voltage Load Regulation | RegLOAD | 5 | 20 | mV | IOUT from 1mA to 150mA, VIN=VOUT+2V | 5 | |
| Output Voltage Load Regulation | RegLOAD | 25 | 60 | mV | IOUT from 1mA to 150mA, VIN=10V | 5 | |
| Maximum Output Current | IOUT | 200 | mA | VIN = VOUT +1V | 5 | ||
| Input Voltage Operation Range | VIN | 36 | V | 5 | |||
| Short Current Protection | ISHORT | 100 | mA | OUT short to GND | 5 | ||
| Output Voltage Accuracy | -2 | 2 | % | Worst-case over load, line, process and temperature (general description) | 1 | ||
| IN pin to GND pin | -0.3 | 40 | V | 4 | |||
| OUT pin to GND pin | -0.3 | 6 | V | 4 | |||
| Operating Junction Temperature | -40 | 125 | °C | 4 | |||
| Storage Temperature | -65 | 150 | °C | 4 | |||
| Lead Temperature | 300 | °C | Soldering, 10 sec | 4 | |||
| ESD (HBM mode) | -2000 | 2000 | V | ESDA/JEDEC JS-001-2017 | 4 | ||
| Recommended output capacitance | 1 | 10 | µF | Ceramic, X7R or X5R | 4 | ||
| Recommended output capacitor ESR | 5 | 100 | mΩ | 4 | |||
| Recommended input capacitance | 1 | 10 | µF | Ceramic, between IN and GND | 3 | ||
| Thermal Resistance (Junction to Ambient), SOT-89 | 135 | °C/W | Junction to ambient | 4 | |||
| Output Noise | eN | 90 | µVRMS | 10Hz to 100kHz, IOUT = 30mA | 5 |
CAD (KiCad official)
- Symbol:
LTP3558-33XT4 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
ltp3558-33xt4-etched.step/ltp3558-33xt4-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltp3558-33xt4.step/ltp3558-33xt4.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Linearin datasheet (10 pp, sha256
006d27c5e87301f9, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LTP3558-33XT4
**Linearin** · Linear Voltage Regulators (LDO) · SOT-89-3
LTP3558-33XT4 from Linearin, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground. |
| 2 | IN | power_in | Supply input pin; must be closely decoupled to GND with a 1μF or greater ceramic capacitor. |
| 3 | OUT | power_out | Output pin; bypass with a 1μF or greater ceramic capacitor from this pin to ground. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Linearin |
| Package | SOT-89-3 |
| Category | Power Supply Chip |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Dropout Voltage | VDROP | | | 820 | mV | VOUT= 3.3 V, IOUT = 150mA | 5 |
| Dropout Voltage | VDROP | | | 520 | mV | VOUT= 3.3 V, IOUT = 100mA | 5 |
| DC Supply Quiescent Current | IQ | | 1.5 | 3 | µA | | 5 |
| Output Voltage Line Regulation | RegLINE | | 0.01 | 0.04 | %/V | VIN = VOUT +1V to 30V, IOUT = 10mA | 5 |
| Output Voltage Load Regulation | RegLOAD | | 5 | 20 | mV | IOUT from 1mA to 150mA, VIN=VOUT+2V | 5 |
| Output Voltage Load Regulation | RegLOAD | | 25 | 60 | mV | IOUT from 1mA to 150mA, VIN=10V | 5 |
| Maximum Output Current | IOUT | | | 200 | mA | VIN = VOUT +1V | 5 |
| Input Voltage Operation Range | VIN | | | 36 | V | | 5 |
| Short Current Protection | ISHORT | | 100 | | mA | OUT short to GND | 5 |
| Output Voltage Accuracy | | -2 | | 2 | % | Worst-case over load, line, process and temperature (general description) | 1 |
| IN pin to GND pin | | -0.3 | | 40 | V | | 4 |
| OUT pin to GND pin | | -0.3 | | 6 | V | | 4 |
| Operating Junction Temperature | | -40 | | 125 | °C | | 4 |
| Storage Temperature | | -65 | | 150 | °C | | 4 |
| Lead Temperature | | | | 300 | °C | Soldering, 10 sec | 4 |
| ESD (HBM mode) | | -2000 | | 2000 | V | ESDA/JEDEC JS-001-2017 | 4 |
| Recommended output capacitance | | 1 | | 10 | µF | Ceramic, X7R or X5R | 4 |
| Recommended output capacitor ESR | | 5 | | 100 | mΩ | | 4 |
| Recommended input capacitance | | 1 | | 10 | µF | Ceramic, between IN and GND | 3 |
| Thermal Resistance (Junction to Ambient), SOT-89 | | | 135 | | °C/W | Junction to ambient | 4 |
| Output Noise | eN | | 90 | | µVRMS | 10Hz to 100kHz, IOUT = 30mA | 5 |
## CAD (KiCad official)
- Symbol: `LTP3558-33XT4`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `ltp3558-33xt4-etched.step` / `ltp3558-33xt4-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltp3558-33xt4.step` / `ltp3558-33xt4.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Linearin datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588945642622631936) (10 pp, sha256 `006d27c5e87301f9`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ltp3558-33xt4-datasheet.pdf)