component
LTM4622IY#PBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, BGA-25. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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LTM4622IY#PBF
Analog Devices · DC-DC Converters · BGA-25
LTM4622IY#PBF from Analog Devices, in a BGA-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | VOUT2 | power_out | Power output of switching regulator channel 2; apply the load between VOUT2 and GND, with output set from 0.6V to 5.5V. |
| A2 | VIN2 | power_in | Channel 2 power input; operates from 1.5V to 20V when VIN1 is above 3.6V, with an absolute maximum of 22V, and decoupling should be placed directly between VIN1/VIN2 and GND. |
| A3 | TRACK/SS2 | input | Channel 2 soft-start and tracking pin with an internal 1.4µA pull-up from INTVCC; below 0.6V it overrides the internal reference, and the internal soft-start is a minimum of 400µs. |
| A4 | FB2 | input | Negative input of the channel 2 error amplifier, internally connected to VOUT2 through a 60.4kΩ precision resistor, with an external resistor to GND programming the output voltage. |
| A5 | COMP2 | passive | Channel 2 current control threshold and error amplifier compensation point with a normal range of 0.3V to 1.8V; the device is internally compensated and this pin must not be driven. |
| B1 | VOUT2 | power_out | Power output of switching regulator channel 2; apply the load between VOUT2 and GND, with output set from 0.6V to 5.5V. |
| B2 | RUN2 | input | Channel 2 run control input that enables the channel when above 1.27V and shuts it down when below 1V; this pin must not be left floating. |
| B3 | VIN2 | power_in | Channel 2 power input; operates from 1.5V to 20V when VIN1 is above 3.6V, with an absolute maximum of 22V, and decoupling should be placed directly between VIN1/VIN2 and GND. |
| B4 | PGOOD2 | output | Open-drain power-good output for channel 2 that is pulled to ground when FB2 is outside ±8% (typical) of the internal 0.6V reference. |
| B5 | GND | power_in | Power ground pin for both input and output returns. |
| C1 | GND | power_in | Power ground pin for both input and output returns. |
| C2 | GND | power_in | Power ground pin for both input and output returns. |
| C3 | INTVCC | power_out | Internal 3.3V regulator output that powers the internal drivers and control circuits, internally decoupled with 2.2µF and rated to an absolute maximum of 3.6V. |
| C4 | FREQ | input | Sets the switching frequency, internally 1MHz by default, with a resistor to GND to increase frequency or to INTVCC to decrease it. |
| C5 | SYNC/MODE | input | Mode select and external synchronization input: tie to GND for forced continuous operation, float or tie to INTVCC for Burst Mode operation at light load, or drive with a clock (high above 2V, low below 0.3V). |
| D1 | VOUT1 | power_out | Power output of switching regulator channel 1; apply the load between VOUT1 and GND, with output set from 0.6V to 5.5V. |
| D2 | RUN1 | input | Channel 1 run control input that enables the channel when above 1.27V and shuts it down when below 1V; this pin must not be left floating. |
| D3 | VIN1 | power_in | Channel 1 power input and supply for the module internal control circuitry; operates from 3.6V to 20V with an absolute maximum of 22V, and decoupling should be placed directly between VIN1/VIN2 and GND. |
| D4 | PGOOD1 | output | Open-drain power-good output for channel 1 that is pulled to ground when FB1 is outside ±8% (typical) of the internal 0.6V reference. |
| D5 | GND | power_in | Power ground pin for both input and output returns. |
| E1 | VOUT1 | power_out | Power output of switching regulator channel 1; apply the load between VOUT1 and GND, with output set from 0.6V to 5.5V. |
| E2 | VIN1 | power_in | Channel 1 power input and supply for the module internal control circuitry; operates from 3.6V to 20V with an absolute maximum of 22V, and decoupling should be placed directly between VIN1/VIN2 and GND. |
| E3 | TRACK/SS1 | input | Channel 1 soft-start and tracking pin with an internal 1.4µA pull-up from INTVCC; below 0.6V it overrides the internal reference, and the internal soft-start is a minimum of 400µs. |
| E4 | FB1 | input | Negative input of the channel 1 error amplifier, internally connected to VOUT1 through a 60.4kΩ precision resistor, with an external resistor to GND programming the output voltage. |
| E5 | COMP1 | passive | Channel 1 current control threshold and error amplifier compensation point with a normal range of 0.3V to 1.8V; the device is internally compensated and this pin must not be driven. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | BGA-25 |
| Category | Power Management (PMIC) |
| Pins | 25 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN1 Input DC Voltage | VIN1 | 3.6 | 20 | V | 3 | ||
| VIN2 Input DC Voltage | VIN2 | 1.5 | 20 | V | 3.6V < VIN1 <20V | 3 | |
| 3.3V Input DC Voltage | VIN_3.3 | 3.1 | 3.3 | 3.5 | V | VIN1 = VIN2 = INTVCC | 3 |
| Output Voltage Range | VOUT(RANGE) | 0.6 | 5.5 | V | VIN1 = VIN2 = 3.6V to 20V | 3 | |
| Output Voltage, Total Variation with Line and Load | VOUT(DC) | 1.477 | 1.5 | 1.523 | V | CIN = 22µF, COUT = 100µF Ceramic, RFB = 40.2k, MODE = INTVCC, VIN1 = VIN2 = 3.6V to 20V, IOUT = 0A to 2.5A | 3 |
| RUN Threshold Rising (RUN Pin On Threshold) | VRUN | 1.2 | 1.27 | 1.35 | V | RUN Threshold Rising | 3 |
| RUN Threshold Falling (RUN Pin On Threshold) | VRUN | 0.97 | 1 | 1.03 | V | RUN Threshold Falling | 3 |
| Output Continuous Current Range | IOUT(DC) | 0 | 2.5 | A | VIN1 = VIN2 = 12V, VOUT = 1.5V | 3 | |
| Line Regulation Accuracy | ΔVOUT (Line)/VOUT | 0.01 | 0.1 | %/V | VOUT = 1.5V, VIN1 = VIN2 = 3.6V to 20V, IOUT = 0A | 3 | |
| Load Regulation Accuracy | ΔVOUT (Load)/VOUT | 0.2 | 1 | % | VOUT = 1.5V, IOUT = 0A to 2.5A | 3 | |
| Output Current Limit | IOUTPK | 3 | 4 | A | VIN1 = VIN2 = 12V, VOUT = 1.5V | 3 | |
| VFB Voltage at FB Pin | VFB | 0.592 | 0.6 | 0.608 | V | IOUT = 0A, VOUT = 1.5V | 3 |
| Current at FB Pin | IFB | -30 | 30 | nA | 3 | ||
| Resistor Between VOUT and FB Pins | RFBHI | 60 | 60.4 | 60.8 | kΩ | 3 | |
| Internal feedback resistor tolerance (60.4k, 0.5%) | RFBHI | -0.5 | 0.5 | % | Internal feedback resistor between VOUT and FB, printed as 0.5% | 10 | |
| Internal Soft-Start Time | tSS | 400 | 700 | μs | 10% to 90% Rise Time | 3 | |
| PGOOD Trip Level (VFB Ramping Negative) | VPGOOD | -14 | -8 | % | VFB With Respect to Set Output, VFB Ramping Negative | 3 | |
| PGOOD Trip Level (VFB Ramping Positive) | VPGOOD | 8 | 14 | % | VFB With Respect to Set Output, VFB Ramping Positive | 3 | |
| Internal VCC Voltage | VINTVCC | 3.1 | 3.3 | 3.5 | V | VIN1 = VIN2 = 3.6V to 20V | 4 |
| Frequency Sync Range | fSYNC | -30 | 30 | % | With Respect to Set Frequency | 4 | |
| VIN1, VIN2 absolute maximum | VIN1, VIN2 | -0.3 | 22 | V | 2 | ||
| VOUT absolute maximum | VOUT | -0.3 | 6 | V | 2 | ||
| PGOOD1, PGOOD2 absolute maximum | PGOOD1, PGOOD2 | -0.3 | 18 | V | 2 | ||
| RUN1, RUN2 absolute maximum | RUN1, RUN2 | -0.3 | V | Maximum printed as VIN + 0.3V | 2 | ||
| INTVCC, TRACK/SS1, TRACK/SS2 absolute maximum | INTVCC, TRACK/SS1, TRACK/SS2 | -0.3 | 3.6 | V | 2 | ||
| SYNC/MODE, COMP1, COMP2, FB1, FB2 absolute maximum | SYNC/MODE, COMP1, COMP2, FB1, FB2 | -0.3 | V | Maximum printed as INTVCC | 2 | ||
| Operating Internal Temperature Range | -40 | 125 | °C | Internal operating temperature range (Note 2) | 2 | ||
| Storage Temperature Range | -55 | 125 | °C | 2 | |||
| Maximum Junction Temperature | TJMAX | 125 | °C | BGA 25-lead package | 2 | ||
| Junction-to-case (top) thermal resistance | θJCtop | 17 | °C/W | BGA 25-lead package | 2 | ||
| Junction-to-case (bottom) thermal resistance | θJCbottom | 11 | °C/W | BGA 25-lead package | 2 | ||
| Junction-to-board plus board-to-ambient thermal resistance | θJB + θBA | 22 | °C/W | BGA 25-lead package | 2 | ||
| Junction-to-ambient thermal resistance | θJA | 22 | °C/W | BGA 25-lead package | 2 |
CAD (KiCad official)
- Symbol:
LTM4622IY#PBF - Footprint:
Package_BGA:BGA-25_6.35x6.35mm_Layout5x5_P1.27mm - 3D model: BGA-25 (KiCad packages3D, STEP)
- 3D model files:
ltm4622iy-pbf-etched.step/ltm4622iy-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltm4622iy-pbf.step/ltm4622iy-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (28 pp, sha256
7ffcd4f226b118bb, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).