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LTC8822XS8

Public Made by Adom

by adom

Linearin Operational Amplifier, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LTC8822XS8

Linearin · Operational Amplifier · SO-8

LTC8822XS8 from Linearin, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Output of amplifier A; the datasheet rates the output short-circuit condition as continuous and lists ISC as ±45 mA.
2 -INA input Inverting input of amplifier A; signal input voltage must stay between VS- - 0.3 V and VS+ + 0.3 V, with input current limited to ±10 mA.
3 +INA input Non-inverting input of amplifier A; the rail-to-rail input range extends 100 mV beyond each supply rail, and input current is limited to ±10 mA.
4 -VS power_in Negative (lowest) power supply; the operating supply range is 1.8 V to 5.5 V (VS+ to VS-), with an absolute maximum of 10.0 V.
5 +INB input Non-inverting input of amplifier B; the rail-to-rail input range extends 100 mV beyond each supply rail, and input current is limited to ±10 mA.
6 -INB input Inverting input of amplifier B; signal input voltage must stay between VS- - 0.3 V and VS+ + 0.3 V, with input current limited to ±10 mA.
7 OUTB output Output of amplifier B; the datasheet rates the output short-circuit condition as continuous and lists ISC as ±45 mA.
8 +VS power_in Positive (highest) power supply; the operating supply range is 1.8 V to 5.5 V (VS+ to VS-), with an absolute maximum of 10.0 V.

Key specifications

Parameter Value
Manufacturer Linearin
Package SO-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VOS -2.5 0.5 2.5 mV 3
Input offset voltage VOS -2.8 2.8 mV TA = −40 to +125 ℃ 3
Offset voltage drift VOS TC -3 0.5 3 μV/℃ TA = −40 to +125 ℃ 3
Power supply rejection ratio PSRR 98 115 dB VS = 2.0 to 5.5 V, VCM < VS+ − 2V 3
Power supply rejection ratio PSRR 88 dB TA = −40 to +125 ℃ 3
Common-mode voltage range VCM -0.1 0.1 V 3
Common-mode voltage range VCM -0.1 V TA = −40 to +125 ℃ 3
Common-mode rejection ratio CMRR 76 92 dB VS = 5.5 V, VCM = −0.1 to 5.5 V 3
Common-mode rejection ratio CMRR 70 dB VCM = 0 to 5.3 V, TA = −40 to +125 ℃ 3
Common-mode rejection ratio CMRR 72 86 dB VS = 2.0 V, VCM = −0.1 to 2.0 V 3
Common-mode rejection ratio CMRR 68 dB VCM = 0 to 1.8 V, TA = −40 to +125 ℃ 3
Open-loop voltage gain AVOL 86 97 dB RL = 25 kΩ, VO = 0.05 to 3.5 V 3
Open-loop voltage gain AVOL 80 dB TA = −40 to +125 ℃ 3
Open-loop voltage gain AVOL 80 92 dB RL = 5 kΩ, VO = 0.15 to 3.5 V 3
Open-loop voltage gain AVOL 74 dB TA = −40 to +125 ℃ 3
High output voltage swing (referenced to VS+) VOH -8 -5 mV RL = 25 kΩ 4
High output voltage swing (referenced to VS+) VOH -36 -26 mV RL = 5 kΩ 4
Low output voltage swing (referenced to VS−) VOL 4 6 mV RL = 25 kΩ 4
Low output voltage swing (referenced to VS−) VOL 16 24 mV RL = 5 kΩ 4
Short-circuit current ISC -45 45 mA 4
Operating supply voltage VS 1.8 5.5 V 4
Quiescent current (per amplifier) IQ 5.2 6.5 μA VS = 2.0V, TA = +25℃ 4
Quiescent current (per amplifier) IQ 6.6 8.5 μA VS = 5.5V, TA = +25℃ 4
Quiescent current (per amplifier) IQ 12 μA TA = −40 to +125 ℃ 4
Input bias current IB 150 pA TA = +85 ℃ 3
Input bias current IB 500 pA TA = +125 ℃ 3
Supply voltage, VS+ to VS− VS 10 V VS+ to VS- 2
Signal input terminals voltage -0.3 0.3 V VS- − 0.3 V (min) to VS+ + 0.3 V (max) 2
Signal input terminals current -10 10 mA 2
Storage temperature range Tstg -65 150 ℃ 2
Junction temperature TJ 150 ℃ 2
Lead temperature range (soldering) 260 ℃ Soldering 10 sec 2
ESD human body model (HBM) -5000 5000 V Per MIL-STD-883J / Method 3015.9 2
ESD charged device model (CDM) -2000 2000 V Per ESDA/JEDEC JS-002-2014 2
ESD machine model (MM) -250 250 V Per JESD22-A115C 2
Operating temperature range TA -40 125 ℃ 4
Package thermal resistance, junction to ambient θJA 125 ℃/W SOIC-8L 4
Input offset current IOS 1 pA 3
Input voltage noise (0.1 to 10 Hz) Vn 6 μVP-P f = 0.1 to 10 Hz 3
Input voltage noise density en 62 nV/√Hz f = 10 kHz 3
Input voltage noise density en 63 nV/√Hz f = 1 kHz 3
Input current noise density In 5 fA/√Hz f = 1 kHz 3
Input resistance RIN 100 GΩ 3
Input capacitance CIN 2 pF Differential 3
Input capacitance CIN 3.5 pF Common mode 3
Gain bandwidth product GBW 500 kHz 3
Slew rate SR 0.25 V/μs G = +1, CL = 100 pF, VO = 1.5 to 3.5 V 3
Total harmonic distortion + noise THD+N 0.005 % G = +1, f = 1 kHz, RL = 2 kΩ, VO = 1 VRMS 3
Settling time tS 6 μs To 0.1%, G = +1, 1V step 3
Settling time tS 7 μs To 0.01%, G = +1, 1V step 3
Overload recovery time tOR 10 μs To 0.1%, VIN * Gain > VS 4

CAD (KiCad official)

  • Symbol: LTC8822XS8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: ltc8822xs8-etched.step / ltc8822xs8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc8822xs8.step / ltc8822xs8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Linearin datasheet (21 pp, sha256 9b44c9af71b6aca6, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF