# LTC8581XT5

**Linearin(先积集成)** · Operational Amplifier · SOT23-5L

LTC8581XT5 from Linearin(先积集成), in a SOT23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Amplifier output; the datasheet states the output short-circuit condition is continuous and its absolute maximum rating is listed as continuous. |
| 2 | -VS | power_in | Negative (lowest) power supply; the device is specified from 1.8 V to 5.5 V total supply, and VS+ to VS- must not exceed 10.0 V absolute maximum. |
| 3 | +IN | input | Non-inverting input; the common-mode range extends 100 mV beyond the negative rail and reaches the positive rail, and signal inputs are limited to VS- - 0.3 V to VS+ + 0.3 V and ±10 mA. |
| 4 | -IN | input | Inverting input of the amplifier; signal inputs are limited to VS- - 0.3 V to VS+ + 0.3 V and ±10 mA. |
| 5 | +VS | power_in | Positive (highest) power supply; the device is specified from 1.8 V to 5.5 V total supply, and VS+ to VS- must not exceed 10.0 V absolute maximum. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Linearin(先积集成) |
| Package | SOT23-5L |
| Category | Amplifiers/Comparators |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage, VS+ to VS- | VS+ to VS- |  |  | 10 | V |  | 2 |
| Signal Input Terminals: Current |  | -10 |  | 10 | mA |  | 2 |
| Storage Temperature Range | Tstg | -65 |  | 150 | ℃ |  | 2 |
| Junction Temperature | TJ |  |  | 150 | ℃ |  | 2 |
| Lead Temperature Range (Soldering) |  |  |  | 260 | ℃ | Soldering 10 sec | 2 |
| ESD Electrostatic Discharge Voltage, Human body model (HBM) |  | -5000 |  | 5000 | V | Human body model (HBM), per MIL-STD-883J / Method 3015.9 | 2 |
| ESD Electrostatic Discharge Voltage, Charged device model (CDM) |  | -2000 |  | 2000 | V | Charged device model (CDM), per ESDA/JEDEC JS-002-2014 | 2 |
| ESD Electrostatic Discharge Voltage, Machine model (MM) |  | -250 |  | 250 | V | Machine model (MM), per JESD22-A115C | 2 |
| Input offset voltage | VOS | -40 | 10 | 40 | μV |  | 3 |
| Offset voltage drift | VOS TC | -0.5 | 0.1 | 0.5 | μV/℃ | TA = −40 to +125 ℃ | 3 |
| Power supply rejection ratio | PSRR | 106 | 120 |  | dB | VS = 2.0 to 5.5 V, VCM < VS+ − 2V | 3 |
| Power supply rejection ratio | PSRR | 97 |  |  | dB | TA = −40 to +125 ℃ | 3 |
| Input bias current | IB |  |  | 250 | pA | TA = +85 ℃ | 3 |
| Input bias current | IB |  |  | 800 | pA | TA = +125 ℃ | 3 |
| Common-mode rejection ratio | CMRR | 100 | 120 |  | dB | VS = 5.5 V, VCM = −0.1 to 5.5 V | 3 |
| Common-mode rejection ratio | CMRR | 96 |  |  | dB | VCM = 0 to 5.3 V, TA = −40 to +125 ℃ | 3 |
| Common-mode rejection ratio | CMRR | 90 | 109 |  | dB | VS = 2.0 V, VCM = −0.1 to 2.0 V | 3 |
| Common-mode rejection ratio | CMRR | 87 |  |  | dB | VCM = 0 to 1.8 V, TA = −40 to +125 ℃ | 3 |
| Open-loop voltage gain | AVOL | 106 | 128 |  | dB | RL = 25 kΩ, VO = 0.05 to 3.5 V | 3 |
| Open-loop voltage gain | AVOL | 100 |  |  | dB | TA = −40 to +125 ℃ | 3 |
| Open-loop voltage gain | AVOL | 98 | 115 |  | dB | RL = 2 kΩ, VO = 0.15 to 3.5 V | 3 |
| Open-loop voltage gain | AVOL | 92 |  |  | dB | TA = −40 to +125 ℃ | 3 |
| Operating supply voltage | VS | 1.8 |  | 5.5 | V | TA = 0 to +70 ℃ | 4 |
| Operating supply voltage | VS | 2 |  | 5.5 | V | TA = −40 to +125 ℃ | 4 |
| Operating temperature range | TA | -40 |  | 125 | ℃ |  | 4 |
| Quiescent current (per amplifier) | IQ |  | 150 | 210 | μA |  | 4 |
| Short-circuit current | ISC | -45 |  | 45 | mA |  | 4 |
| Package thermal resistance, junction to ambient, SOT23-5L | θJA |  | 190 |  | ℃/W | SOT23-5L | 4 |
| Input bias current | IB |  | 50 |  | pA |  | 3 |
| Input offset current | IOS |  | 100 |  | pA |  | 3 |
| Input voltage noise | Vn |  | 1 |  | μVP-P | f = 0.1 to 10 Hz | 3 |
| Input voltage noise density | en |  | 19 |  | nV/√Hz | f = 100 Hz | 3 |
| Input current noise density | In |  | 10 |  | fA/√Hz | f = 1 kHz | 3 |
| Input resistance | RIN |  | 100 |  | GΩ |  | 3 |
| Input capacitance, differential | CIN |  | 2 |  | pF | Differential | 3 |
| Input capacitance, common mode | CIN |  | 3.5 |  | pF | Common mode | 3 |
| Gain bandwidth product | GBW |  | 2 |  | MHz | f = 1 kHz | 3 |
| Slew rate | SR |  | 1.3 |  | V/μs | G = +1, CL = 100 pF, VO = 1.5 to 3.5 V | 3 |
| Settling time to 0.1% | tS |  | 1.2 |  | μs | To 0.1%, G = +1, 1V step | 3 |
| Settling time to 0.01% | tS |  | 1.5 |  | μs | To 0.01%, G = +1, 1V step | 3 |
| Open-loop output impedance | ZOUT |  | 2 |  | kΩ | f = 350 kHz, IO = 0 | 4 |

## CAD (KiCad official)

- Symbol: `LTC8581XT5`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT23-5L (KiCad packages3D, STEP)
- 3D model files: `ltc8581xt5-etched.step` / `ltc8581xt5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc8581xt5.step` / `ltc8581xt5.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Linearin(先积集成) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603009932854259712) (22 pp, sha256 `df239dddb4e70016`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ltc8581xt5-datasheet.pdf)