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Contents

README

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LTC8581XS8

Linearin(先积集成) · IC · SOIC-8L

LTC8581XS8 from Linearin(先积集成), in a SOIC-8L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection.
2 -IN input Inverting input of the amplifier; input common-mode range extends 100 mV below the negative supply to the positive supply.
3 +IN input Non-inverting input of the amplifier; input common-mode range extends 100 mV below the negative supply to the positive supply.
4 -VS power_in Negative (lowest) power supply.
5 NC unconnected No internal connection.
6 OUT output Amplifier output with rail-to-rail swing and short-circuit current of ±45 mA typical.
7 +VS power_in Positive (highest) power supply, 1.8 V to 5.5 V operating range (2.0 V to 5.5 V over -40 to +125 °C), 10 V absolute maximum between supplies.
8 NC unconnected No internal connection.

Key specifications

Parameter Value
Manufacturer Linearin(先积集成)
Package SOIC-8L
Category
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, VS+ to VS- (absolute maximum) 10 V 2
Signal input current -10 10 mA Signal input terminals, printed as ±10 mA 2
Storage temperature range, Tstg Tstg -65 150 ℃ 2
Junction temperature, TJ TJ 150 ℃ 2
Lead temperature range (soldering) 260 ℃ Soldering 10 sec 2
ESD human body model (HBM) -5000 5000 V Per MIL-STD-883J / Method 3015.9, printed as ±5 000 V 2
ESD charged device model (CDM) -2000 2000 V Per ESDA/JEDEC JS-002-2014, printed as ±2 000 V 2
ESD machine model (MM) -250 250 V Per JESD22-A115C, printed as ±250 V 2
Input offset voltage VOS -40 10 40 μV 3
Offset voltage drift VOS TC -0.5 0.1 0.5 μV/℃ TA = −40 to +125 ℃ 3
Power supply rejection ratio PSRR 106 120 dB VS = 2.0 to 5.5 V, VCM < VS+ − 2V 3
Power supply rejection ratio (hot) PSRR 97 dB TA = −40 to +125 ℃ 3
Input bias current IB 250 pA TA = +85 ℃ 3
Input bias current (hot) IB 800 pA TA = +125 ℃ 3
Common-mode rejection ratio CMRR 100 120 dB VS = 5.5 V, VCM = −0.1 to 5.5 V 3
Common-mode rejection ratio (hot, 5 V) CMRR 96 dB VCM = 0 to 5.3 V, TA = −40 to +125 ℃ 3
Common-mode rejection ratio (2 V) CMRR 90 109 dB VS = 2.0 V, VCM = −0.1 to 2.0 V 3
Common-mode rejection ratio (hot, 1.8 V) CMRR 87 dB VCM = 0 to 1.8 V, TA = −40 to +125 ℃ 3
Open-loop voltage gain AVOL 106 128 dB RL = 25 kΩ, VO = 0.05 to 3.5 V 3
Open-loop voltage gain (hot, RL = 25 kΩ block) AVOL 100 dB TA = −40 to +125 ℃ 3
Open-loop voltage gain (RL = 2 kΩ) AVOL 98 115 dB RL = 2 kΩ, VO = 0.15 to 3.5 V 3
Open-loop voltage gain (hot, RL = 2 kΩ block) AVOL 92 dB TA = −40 to +125 ℃ 3
Operating supply voltage VS 1.8 5.5 V TA = 0 to +70 ℃ 4
Operating supply voltage (hot) VS 2 5.5 V TA = −40 to +125 ℃ 4
Quiescent current (per amplifier) IQ 150 210 μA 4
Operating temperature range TA -40 125 ℃ 4
Package thermal resistance, junction to ambient (SOIC-8L) θJA 125 ℃/W SOIC-8L 4

CAD (KiCad official)

  • Symbol: LTC8581XS8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8L (KiCad packages3D, STEP)
  • 3D model files: ltc8581xs8-etched.step / ltc8581xs8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc8581xs8.step / ltc8581xs8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Linearin(先积集成) datasheet (22 pp, sha256 df239dddb4e70016, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF