# LTC8544XS14

**Linearin(先积集成)** · Operational Amplifier · SOIC-14L

LTC8544XS14 from Linearin(先积集成), in a SOIC-14L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Amplifier A output. |
| 2 | -INA | input | Amplifier A inverting input; voltage range is from (VS- - 0.1V) to (VS+ + 0.1V). |
| 3 | +INA | input | Amplifier A non-inverting input; same voltage range as -IN, (VS- - 0.1V) to (VS+ + 0.1V). |
| 4 | +VS | power_in | Positive power supply; supply voltage VS+ to VS- must not exceed 10.0 V absolute maximum. |
| 5 | +INB | input | Amplifier B non-inverting input; same voltage range as -IN, (VS- - 0.1V) to (VS+ + 0.1V). |
| 6 | -INB | input | Amplifier B inverting input; voltage range is from (VS- - 0.1V) to (VS+ + 0.1V). |
| 7 | OUTB | output | Amplifier B output. |
| 8 | OUTC | output | Amplifier C output. |
| 9 | -INC | input | Amplifier C inverting input; voltage range is from (VS- - 0.1V) to (VS+ + 0.1V). |
| 10 | +INC | input | Amplifier C non-inverting input; same voltage range as -IN, (VS- - 0.1V) to (VS+ + 0.1V). |
| 11 | -VS | power_in | Negative power supply (ground in single-supply operation). |
| 12 | +IND | input | Amplifier D non-inverting input; same voltage range as -IN, (VS- - 0.1V) to (VS+ + 0.1V). |
| 13 | -IND | input | Amplifier D inverting input; voltage range is from (VS- - 0.1V) to (VS+ + 0.1V). |
| 14 | OUTD | output | Amplifier D output. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Linearin(先积集成) |
| Package | SOIC-14L |
| Category | Amplifiers/Comparators |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage VS+ to VS- | VS |  |  | 10 | V |  | 2 |
| Signal Input Terminals Current |  | -10 |  | 10 | mA | Signal input terminals, current | 2 |
| Storage Temperature Range | Tstg | -65 |  | 150 | ℃ |  | 2 |
| Junction Temperature | TJ |  |  | 150 | ℃ |  | 2 |
| Lead Temperature Range (Soldering) |  |  |  | 260 | ℃ | Soldering 10 sec | 2 |
| ESD Human Body Model (HBM) |  | -5000 |  | 5000 | V | MIL-STD-883J Method 3015.9 | 2 |
| ESD Charged Device Model (CDM) |  | -2000 |  | 2000 | V | ESDA/JEDEC JS-002-2014 | 2 |
| ESD Machine Model (MM) |  | -250 |  | 250 | V | JESD22-A115C | 2 |
| Input offset voltage | VOS | -2.5 | 0.5 | 2.5 | mV |  | 3 |
| Input offset voltage over temperature | VOS | -2.8 |  | 2.8 | mV | TA = −40 to +125 ℃ | 3 |
| Offset voltage drift | VOS TC |  | 1 | 3 | μV/℃ | TA = −40 to +125 ℃ | 3 |
| Power supply rejection ratio | PSRR | 80 | 110 |  | dB | VS = 2.0 to 5.5 V, VCM < VS+ − 2V | 3 |
| Power supply rejection ratio over temperature | PSRR | 75 |  |  | dB | TA = −40 to +125 ℃ | 3 |
| Input bias current | IB |  |  | 150 | pA | TA = +85 ℃ | 3 |
| Input bias current | IB |  |  | 500 | pA | TA = +125 ℃ | 3 |
| Common-mode rejection ratio | CMRR | 70 | 83 |  | dB | VS = 5.5 V, VCM = −0.1 to 5.6 V | 3 |
| Common-mode rejection ratio over temperature | CMRR | 65 |  |  | dB | VCM = 0 to 5.3 V, TA = −40 to +125 ℃ | 3 |
| Common-mode rejection ratio | CMRR | 65 | 77 |  | dB | VS = 2.0 V, VCM = −0.1 to 2.1 V | 3 |
| Common-mode rejection ratio over temperature | CMRR | 60 |  |  | dB | VCM = 0 to 1.8 V, TA = −40 to +125 ℃ | 3 |
| Open-loop voltage gain | AVOL | 90 | 105 |  | dB | RL = 25 kΩ, VO = 0.05 to 3.5 V | 3 |
| Open-loop voltage gain over temperature | AVOL | 85 |  |  | dB | TA = −40 to +125 ℃ | 3 |
| Open-loop voltage gain | AVOL | 85 | 100 |  | dB | RL = 2 kΩ, VO = 0.15 to 3.5 V | 3 |
| Open-loop voltage gain over temperature | AVOL | 80 |  |  | dB | TA = −40 to +125 ℃ | 3 |
| Operating supply voltage | VS | 1.8 |  | 5.5 | V | TA = 0 to +70 ℃ | 4 |
| Operating supply voltage | VS | 2 |  | 5.5 | V | TA = −40 to +125 ℃ | 4 |
| Quiescent current (per amplifier) | IQ |  | 75 | 125 | μA |  | 4 |
| Quiescent current (per amplifier) over temperature | IQ |  |  | 160 | μA | TA = −40 to +125 ℃ | 4 |
| Operating temperature range | TA | -40 |  | 125 | ℃ |  | 4 |
| Package thermal resistance SOIC-14L | θJA |  | 115 |  | ℃/W |  | 4 |

## CAD (KiCad official)

- Symbol: `LTC8544XS14`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14L (KiCad packages3D, STEP)
- 3D model files: `ltc8544xs14-etched.step` / `ltc8544xs14-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ltc8544xs14.step` / `ltc8544xs14.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Linearin(先积集成) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603166806387404800) (20 pp, sha256 `2f45044fde2eb4b8`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ltc8544xs14-datasheet.pdf)